Access Polling Patents (Class 710/220)
  • Patent number: 11842054
    Abstract: Disclosed in some examples are systems, methods, memory devices, and machine readable mediums for a fast secure data destruction for NAND memory devices that renders data in a memory cell unreadable. Instead of going through all the erase phases, the memory device may remove sensitive data by performing only the pre-programming phase of the erase process. Thus, the NAND doesn't perform the second and third phases of the erase process. This is much faster and results in data that cannot be reconstructed. In some examples, because the erase pulse is not actually applied and because this is simply a programming operation, data may be rendered unreadable at a per-page level rather than a per-block level as in traditional erases.
    Type: Grant
    Filed: December 21, 2021
    Date of Patent: December 12, 2023
    Assignee: Micron Technology, Inc.
    Inventor: Sebastien Andre Jean
  • Patent number: 11693599
    Abstract: Methods, systems, and devices related to domain-based access in a memory device are described. In one example, a memory device in accordance with the described techniques may include a memory array, a sense amplifier array, and a signal development cache configured to store signals (e.g., cache signals, signal states) associated with logic states (e.g., memory states) that may be stored at the memory array (e.g., according to various read or write operations). The memory array may be organized according to domains, which may refer to various configurations or collections of access lines, and selections thereof, of different portions of the memory array. In various examples, a memory device may determine a plurality of domains for a received access command, or an order for accessing a plurality of domains for a received access command, or combinations thereof, based on an availability of the signal development cache.
    Type: Grant
    Filed: January 4, 2022
    Date of Patent: July 4, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Dmitri A. Yudanov, Shanky Kumar Jain
  • Patent number: 11481342
    Abstract: A data storage system can organize a semiconductor memory into a first data set and a second data set with a first queue populated with a first data access request from a host. An assignment of an arbitration weight to the first queue with an arbitration circuit corresponds with the first queue being skipped during a deterministic window based on the arbitration weight.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: October 25, 2022
    Inventors: Robert Wayne Moss, Michael Shaw, Thomas V. Spencer, Yalan Liu, Sarvani Reddy Kolli
  • Patent number: 11150698
    Abstract: A docking station according to embodiments provides power to an Information Handling System (IHS) coupled to the docking station. The docking station includes a first power circuit supporting a first power output according to a power delivery protocol limited to a first power level. The docking station also includes a second power circuit supporting a second power output for providing the input power of the docking station to the IHS. A controller of the docking station determines whether the IHS requires power using the power delivery protocol and selects the operation of the first or second power circuit. The docking station may support dual of such selectable power pathways using a docking cable joined from two individual cables, where each cable provides a separate power and/or data coupling. The docking station thus supports powering devices according to a power delivery protocol or using the input power to the docking station.
    Type: Grant
    Filed: May 1, 2019
    Date of Patent: October 19, 2021
    Assignee: Dell Products, L.P.
    Inventors: Merle Jackson Wood, III, Marcin M. Nowak
  • Patent number: 11119781
    Abstract: A data processing system includes multiple processing units all having access to a shared memory. A processing unit of the data processing system includes a processor core including an upper level cache, core reservation logic that records addresses in the shared memory for which the processor core has obtained reservations, and an execution unit that executes memory access instructions including a fronting load instruction. Execution of the fronting load instruction generates a load request that specifies a load target address. The processing unit further includes lower level cache that, responsive to receipt of the load request and based on the load request indicating an address match for the load target address in the core reservation logic, protects the load target address against access by any conflicting memory access request during a protection interval following servicing of the load request.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: September 14, 2021
    Assignee: International Business Machines Corporation
    Inventors: Derek E. Williams, Guy L. Guthrie, Hugh Shen, Sanjeev Ghai
  • Patent number: 10970131
    Abstract: A gateway for interfacing a host with a subsystem for acting as a work accelerator to the host, the gateway enabling the transfer of batches of data to and from the subsystem at pre-compiled data exchange synchronisation points attained by the subsystem. The gateway is configured to: receive from a storage system data determined by the host to be processed by the subsystem; store a number of credits indicating the availability of data for transfer to the subsystem at each pre-compiled data exchange synchronisation point; receive a synchronisation request from the subsystem when it attains a data exchange synchronisation point; and in response to determining that the number of credits comprises a non-zero number of credits: transmit a synchronisation acknowledgment to the subsystem; and cause the received data to be transferred to the subsystem.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: April 6, 2021
    Assignee: Graphcore Limited
    Inventors: Ola Tørudbakken, Daniel John Pelham Wilkinson, Richard Luke Southwell Osborne, Stephen Felix, Matthew David Fyles, Brian Manula, Harald Høeg
  • Patent number: 10928856
    Abstract: Method and systems reduce response times when docking an Information Handling System (IHS) to a docking station. While the IHS is configured in a low-power mode and in transport in vicinity of the docking station, a proximity to the location of the docking station is detected. An upcoming event at the location the docking station may also be detected. Identities of peripheral devices coupled to the docking station are determined. Instructions are loaded for operation of the peripheral devices by the IHS, where the instructions are loaded without the IHS being coupled to the dock. The instructions may include a device table including addresses for communicating with the peripheral devices. Access to the peripheral devices is blocked until a coupling is detected between the IHS and the docking station. If no coupling is detected within a time threshold, the instructions for operation of the peripheral devices are unloaded.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: February 23, 2021
    Assignee: Dell Products, L.P.
    Inventors: Daniel L. Hamlin, Vivek Viswanathan Iyer
  • Patent number: 10860058
    Abstract: An expandable electronic computing system including an electronic computing system comprising: at least at least a graphics processing unit for generating a PCI-E signal; a signal conversion unit for receiving a PCI-E signal and converting it into a USB signal; a main control unit for driving the signal conversion unit to operate; a USB interface device for receiving the USB signal transmitted by the signal conversion unit, and for transmitting the USB signal to a USB port of an external host through a USB transmission cable. Accordingly, the USB signal generated by one or more electronic computing systems can be transmitted to the external host through the USB port, thereby improving the computing ability of the external host to perform graphics processing tasks or general computing tasks.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: December 8, 2020
    Assignee: Talos Technology Enterprise Co., Ltd
    Inventors: Ya Ju Chang, Jisun Kim
  • Patent number: 10664306
    Abstract: An apparatus is provided comprising processing circuitry to perform data processing in response to instructions of one of a plurality of software execution environments. At least one memory system component handles memory transactions for accessing data, with each memory transaction specifying a partition identifier allocated to a software execution environment associated with the memory transaction. The at least one memory system component is configured to select one of a plurality of sets of memory transaction progression parameters associated with the partition identifier specified by a memory transaction to be handled. Memory transaction progression control circuitry controls progression of the memory transaction in dependence on the selected set of memory transaction progression parameters.
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: May 26, 2020
    Assignee: ARM Limited
    Inventor: Steven Douglas Krueger
  • Patent number: 10606510
    Abstract: A system for managing memory input/output management is provided herein. The system may include a processor and a memory storing machine-readable instructions that when executed by the processor, cause the system to perform operations including receiving read requests for first data stored on a solid-state storage drive, receiving write requests for second data to be stored on the storage drive, placing at least some of the read requests in a first queue, placing at least some of the write requests in a second queue, the second queue having a size limit, processing data at a disk driver layer from the first queue and the second queue in a manner such that selection of a request from either queue is biased towards the first queue. Associated methods are also included.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: March 31, 2020
    Assignee: Netflix, Inc.
    Inventor: M. Warner Losh
  • Patent number: 10568018
    Abstract: Systems, methods, and processing nodes are related to preventing message overloading in a wireless network. The method includes establishing, by the access node, the wireless connection with the wireless device. The method also includes forwarding, from the access node to a controller node, a network connection message from the wireless device. The network connection message requests connection to network services of the wireless network. Additionally, the method includes receiving, at the access node from the controller node, a message indicating that the wireless device is denied access to the network services. Also, the method includes terminating, at the access node, the wireless connection with the wireless device in response to receiving the message. The method further includes limiting, at the access node, an establishment of future wireless connections with the wireless device in response to receiving the message.
    Type: Grant
    Filed: April 19, 2018
    Date of Patent: February 18, 2020
    Assignee: Sprint Spectrum L.P.
    Inventors: Ankur Sharma, Yu Zhou, Noman Alam
  • Patent number: 9876728
    Abstract: A first cache stores preferential packets to be preferentially processed. A second cache stores packets other than the packets stored in the first cache. A processing circuit adjusts the number of preferential packets stored in the first cache in a manner such that the preferential packets are processed at the amount of processing that is equal to or less than a set value set as the amount of processing applicable to the preferential packets within a predetermined period, processes the packets stored in the first cache, and reads from the second cache as many packets as are processable at a surplus value, and processes the read packets, the surplus value being obtained by subtracting the amount of processing to be applied to the preferential packets stored in the first cache from the amount of processing that the processing circuit is capable of performing within the predetermined period.
    Type: Grant
    Filed: October 9, 2014
    Date of Patent: January 23, 2018
    Assignee: FUJITSU LIMITED
    Inventors: Yoshinobu Inoue, Nobuhiko Fukuda
  • Patent number: 9818196
    Abstract: A method for positioning and navigating for use in an electronic device, includes: obtaining an initial coordinate of a user; obtaining a preset number of one or more environment pictures in a preset geographic range corresponding to the initial coordinate, and obtaining an absolute coordinate corresponding to each of the obtained environment pictures from a preset correspondence relationship between different environment pictures and different absolute coordinates; obtaining, for each of the obtained environment pictures, a relative position between an object in the environment picture and the user; and determining current geographic position information of the user based on the relative position and the absolute coordinate.
    Type: Grant
    Filed: November 17, 2014
    Date of Patent: November 14, 2017
    Assignee: Xiaomi Inc.
    Inventors: Peng Zhou, Yanbin Yuan
  • Patent number: 9772863
    Abstract: Copying information handling system (IHS) configuration settings between information handling devices may include a first logic unit of a first IHS generating an encoded Quick Response (QR) code corresponding to one or more information handling system configuration settings of the first IHS. A display connected to the first IHS may display the QR code. A camera connected to a second IHS may read an image of the QR code. A second logic unit of the second IHS may decode the information handling system configuration settings from the QR code. The second logic unit may adjust the information handling system configuration settings of the second IHS to match the information handling system configuration settings from the first IHS. In one embodiment the camera may read the image of the QR code from a display of a mobile device held within a field of view of the camera by a user.
    Type: Grant
    Filed: October 15, 2014
    Date of Patent: September 26, 2017
    Assignee: Dell Products, L.P.
    Inventor: Dirie N. Herzi
  • Patent number: 9641498
    Abstract: Systems, methods and computer-readable media are disclosed for performing single sign-on processing between associated mobile applications. The single sign-on processing may include processing to generate an interaction session between a user and a back-end server associated with a mobile application based at least in part on one or more existing interaction sessions between the user and one or more back-end servers associated with one or more other mobile applications. In order to establish an interaction session with an associated back-end server, a mobile application may leverage existing interaction sessions that have already been established in connection with the launching of other associated mobile applications.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: May 2, 2017
    Assignee: FISERV, INC.
    Inventors: David Francis Scavo, Barbara Wilson Whiteside
  • Patent number: 9524167
    Abstract: Techniques are described for providing users with access to computer networks, such as to enable users to create and configure computer networks that are provided by a remote configurable network service for the users' use. Computer networks provided by the configurable network service may be configured to be private computer networks that are accessible only by the users who create them, and may each be created and configured by a client of the configurable network service to be an extension to an existing computer network of the client, such as a private computer network extension to an existing private computer network of the client. In addition, access to remote resource services may be configured and provided from such computer networks in various manners, such as to automatically include access control information to limit access to particular resources to computing nodes at the location of that provided computer network.
    Type: Grant
    Filed: December 10, 2008
    Date of Patent: December 20, 2016
    Assignee: Amazon Technologies, Inc.
    Inventors: Daniel T. Cohn, Eric Jason Brandwine, Andrew J. Doane
  • Patent number: 9501237
    Abstract: An automatic mutual exclusion computer programming system is disclosed which allows a programmer to produce concurrent programming code that is synchronized by default without the need to write any synchronization code. The programmer creates asynchronous methods which are not permitted make changes to shared memory that they cannot reverse, and can execute concurrently with other asynchronous methods. Changes to shared memory are committed if no other thread has accessed shared memory while the asynchronous method executed. Changes are reversed and the asynchronous method is re-executed if another thread has made changes to shared memory. The resulting program executes in a serialized order. A blocking system method is disclosed which causes the asynchronous method to re-execute until the blocking method's predicate results in an appropriate value. A yield system call is disclosed which divides asynchronous methods into atomic fragments.
    Type: Grant
    Filed: February 5, 2016
    Date of Patent: November 22, 2016
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Andrew David Birrell, Michael Acheson Isard
  • Patent number: 9471535
    Abstract: Three-dimensional (3-D) processor devices are provided, which are constructed by connecting processors in a stacked configuration. For instance, a processor system includes a first processor chip comprising a first processor and a second processor chip comprising a second processor. The first and second processor chips are connected in a stacked configuration with the first and second processors connected through vertical connections between the first and second processor chips. The processor system further includes a mode control circuit to selectively operate the processor system in one of a plurality of operating modes. For example, in a one mode of operation, the first and second processors are configured to implement a run-ahead function, wherein the first processor operates a primary thread of execution and the second processor operates a run-ahead thread of execution.
    Type: Grant
    Filed: April 20, 2012
    Date of Patent: October 18, 2016
    Assignee: International Business Machines Corporation
    Inventors: Alper Buyuktosunoglu, Philip G. Emma, Allan M. Hartstein, Michael B. Healy, Krishnan Kunjunny Kailas
  • Patent number: 9361027
    Abstract: The present invention is drawn to a register writing mechanism that does not require reading of the data in the register. In accordance with aspects of the present invention, each register is masked with a making bit provided by a masking component. In a first implementation, the first half of the bit registers are masked using data in the second half of the bit registers. In a second implementation, all the bit registers are masked using a masking word generated by the masking component.
    Type: Grant
    Filed: December 16, 2014
    Date of Patent: June 7, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Saket Jalan, Rakesh Channabasappa Yaraduyathinahalli
  • Patent number: 9342347
    Abstract: A system and method for implementing direct attachment of VMs, implemented on a computer system, to hardware devices attached to the computer system. Direct attachment architecture is implemented. The direct attachment is an exclusive dedication of a hardware device to a VM, where a particular hardware device is assigned to a particular VM. When the VM is not activated, the hardware device can be re-assigned to another VM. At system start up, hardware devices are masked from a host OS of a computer system and are automatically attached to the assigned VMs.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: May 17, 2016
    Assignee: Parallels IP Holdings GmbH
    Inventors: Serguei M. Beloussov, Maxim A. Kuzkin, Andrey A. Omelyanchuk, Stanislav S. Protassov, Alexader G. Tormasov
  • Patent number: 9250848
    Abstract: Disclosed are methods of allocating tasks for a print job in a multi-threaded system. One method determines a utilisation measure of at least one of a plurality of intermediate data generating threads, and a complexity limit of a intermediate data generation task. The complexity limit is decreased if the determined utilisation measure of the intermediate data generating thread is under a predetermined threshold. The complexity limit limits a processing load of the intermediate data generation task to be allocated to the intermediate data generating thread. The method then compares the processing load of the intermediate data generation task to be allocated with the determined complexity limit, and allocates the intermediate data generation task to the intermediate data generating thread for processing in an event that the processing load of the intermediate data generation task satisfies the complexity limit.
    Type: Grant
    Filed: December 12, 2012
    Date of Patent: February 2, 2016
    Assignee: Canon Kabushiki Kaisha
    Inventors: Paul William Morrison, Ekaterina Stefanov
  • Patent number: 9137209
    Abstract: Techniques are described for providing users with access to computer networks, such as to enable users to create computer networks that are provided by a remote configurable network service for use by the users. Such provided computer networks may be configured to be private computer networks accessible only by the users who create them, and may each be created and configured by a client of the configurable network service to be an extension to an existing computer network of the client, such as a private computer network extension to an existing private computer network of the client. In addition, access to remote resource services may be configured and provided from such computer networks in various manners, such as to include a local access mechanism as part of a provided computer network that is configured to forward communications sent to the access mechanism to a particular remote resource service.
    Type: Grant
    Filed: December 10, 2008
    Date of Patent: September 15, 2015
    Assignee: Amazon Technologies, Inc.
    Inventors: Eric Jason Brandwine, Daniel T. Cohn, Andrew J. Doane
  • Patent number: 9015395
    Abstract: In one embodiment, the method for registering to a wireless network includes transmitting a registration request from a device designated as having a low access priority. The registration request includes a value indicating that the device supports multiple access priorities. The multiple access priorities include the low access priority and at least one higher access priority. The method further includes requesting access when connecting to the wireless network based on a response to the registration request.
    Type: Grant
    Filed: May 10, 2012
    Date of Patent: April 21, 2015
    Assignee: Alcatel Lucent
    Inventors: Deborah Barclay, Alessio Casati
  • Patent number: 9003093
    Abstract: A connector apparatus and the associated method are provided for bridging data between entities, such as between data source(s) and data target(s). In a method, first and second data bridge connections are established between a connector apparatus and a data source and between a connector apparatus and a data target, respectively. Each data bridge connection includes a data pipe having one or more data flows with each data flow dedicated to a particular data type. The method includes sending a polling request from the connector apparatus to the data source via the first data bridge connection and receiving data from the data source over the first data pipe in response to the polling request. The method includes sending the received data to the data target over the second data pipe when the data target has subscribed to the data received from the data source over the first data pipe.
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: April 7, 2015
    Assignee: McKesson Financial Holdings
    Inventor: Eldon Wong
  • Patent number: 8769546
    Abstract: Method to selectively assign a reduced busy-wait time to threads is described. The method comprises determining whether at least one thread is spinning on a mutex lock associated with a condition variable and assigning, when the at least one thread is spinning on the mutex lock, a predetermined reduced busy-wait time for a subsequent thread spinning on the mutex lock.
    Type: Grant
    Filed: January 7, 2010
    Date of Patent: July 1, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Rakesh Sasidharan Nair, Sherin Thyil George, Aswin Chandramouleeswaran
  • Patent number: 8694707
    Abstract: A method and apparatus are disclosed for providing a DMA process. Accordingly, a DMA process is initiated for moving data from contiguous first locations to contiguous second locations and to a third location or third locations. Within the DMA process the data from each of the contiguous first locations is retrieved and stored in a corresponding one of the contiguous second locations and in the third location or corresponding one of the third locations. The DMA process is performed absent retrieving the same data a second other time prior to storing of same within the corresponding one of the contiguous second locations and in the third location or corresponding one of the third locations.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: April 8, 2014
    Assignee: Elliptic Technologies Inc.
    Inventors: Michael Bowler, Neil Hamilton
  • Publication number: 20140075073
    Abstract: A connector apparatus and the associated method are provided for bridging data between entities, such as between data source(s) and data target(s). In a method, first and second data bridge connections are established between a connector apparatus and a data source and between a connector apparatus and a data target, respectively. Each data bridge connection includes a data pipe having one or more data flows with each data flow dedicated to a particular data type. The method includes sending a polling request from the connector apparatus to the data source via the first data bridge connection and receiving data from the data source over the first data pipe in response to the polling request. The method includes sending the received data to the data target over the second data pipe when the data target has subscribed to the data received from the data source over the first data pipe.
    Type: Application
    Filed: September 7, 2012
    Publication date: March 13, 2014
    Applicant: MCKESSON FINANCIAL HOLDINGS
    Inventor: Eldon Wong
  • Publication number: 20130304956
    Abstract: In one embodiment, the method for registering to a wireless network includes transmitting a registration request from a device designated as having a low access priority. The registration request includes a value indicating that the device supports multiple access priorities. The multiple access priorities include the low access priority and at least one higher access priority. The method further includes requesting access when connecting to the wireless network based on a response to the registration request.
    Type: Application
    Filed: May 10, 2012
    Publication date: November 14, 2013
    Applicants: ALCATEL-LUCENT TELECOM LTD., ALCATEL-LUCENT USA INC.
    Inventors: Deborah Barclay, Alessio Casati
  • Patent number: 8570550
    Abstract: A method of controlling a print device using an instruction corresponding to a command received from a remote location. A second server may transmit a query directed to a first server. The second server may be prevented from receiving unauthorized communication from the first server by a firewall. If the first server has a relevant command available, the second server may receive a response to the query. The response may include the relevant command. The second server may determine a print device for which the command is relevant. An instruction corresponding to the relevant command may be sent from the second server to the print device. Communication between the print device and the second server may not be restricted by the firewall. The printing device may implement the instruction. If the first server does not have a relevant command available, the transmitting may automatically repeat until the first server has a relevant command available.
    Type: Grant
    Filed: September 11, 2007
    Date of Patent: October 29, 2013
    Assignee: Xerox Corporation
    Inventors: Kirk V. Pothos, Krishna Kumar
  • Patent number: 8555292
    Abstract: Two threads may communicate via shared memory using two different modes. In a polling mode, a receiving thread may poll an indicator set by the sending thread to determine if a message is present. In a blocking mode, the receiving thread may wait until a synchronization object is set by the sending thread which may cause the receiving thread to return to the polling mode. The polling mode may have low latency buy may use processor activity of the receiving thread to repetitively check the indictor. The blocking mode may have a higher latency but may allow the receiving thread to enter a sleep mode or perform other activities.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: October 8, 2013
    Assignee: Microsoft Corporation
    Inventor: Erez Haba
  • Patent number: 8539485
    Abstract: A first thread enters a polling loop to wait for a signal from a second thread before processing instructions dependent on the polling loop. When entering the polling loop, the first thread sets a reservation for a predetermined memory address. The first thread then executes a reservation-based instruction that can change the execution state of the first thread. Reservation circuitry of the processing device that was executing the first thread monitors the reservation. In the event that the reservation cleared, such as by the second thread modifying data at the predetermined memory address, the first thread is reinstated to its prior execution state. By using a hardware reservation mechanism to monitor for clearing of a set reservation, repeated memory accesses to the memory address by the first thread can be minimized or avoided while in the polling loop and other threads can be allowed to execute at the processing device with reduced interference from the waiting thread.
    Type: Grant
    Filed: November 20, 2007
    Date of Patent: September 17, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Michael D. Snyder, Gary L. Whisenhunt
  • Patent number: 8521930
    Abstract: Systems and methods schedule periodic and non-periodic transactions in a multi-port bus environment. The method may comprise performing multiple search passes through a first array of endpoints to determine whether dispatch resources are available for active endpoints satisfying a set of sort criteria. When dispatch resources are not available for an endpoint, a sort level may be marked with a marker to indicate that an endpoint has not been serviced. After the active endpoints in the first array have been serviced by dispatching a periodic transaction to the endpoint or by marking a sort level corresponding to the endpoint, a non-periodic transaction may be dispatched to an active endpoint in a second array. In response to receiving an indication that the dispatch resources have become available, a subsequent search pass may be made through the first array, starting with a highest priority sort level that is marked with the marker.
    Type: Grant
    Filed: July 25, 2011
    Date of Patent: August 27, 2013
    Assignee: Fresco Logic, Inc.
    Inventor: Christopher Michael Meyers
  • Patent number: 8499299
    Abstract: Techniques for ensuring deterministic thread context switching in a virtual machine application program include, in one embodiment, providing a single application-level mutex that threads of the executing application program are forced to acquire to execute application code of the virtual machine application program. During a first recorded execution of the virtual machine application program, a record is created and stored in a computer that indicates the order in which threads acquire the application-level mutex.
    Type: Grant
    Filed: June 29, 2010
    Date of Patent: July 30, 2013
    Assignee: CA, Inc.
    Inventors: Arpad Jakab, Humberto Yeverino, Suman Cherukuri, Jeffrey Daudel, Jonathan Lindo
  • Patent number: 8417851
    Abstract: In a disclosed example of a method, a requested value of a target register may be specified as a precondition to performing a requested read or write operation. The requested read or write operation may be generated by a requesting device, such as a processor, and sent over a bus to a peripheral device containing the target register. The target register may be polled internally to the peripheral device without generating additional bus traffic between the requesting device and the peripheral device. A ring topology may be used to internally poll the target register and to perform the requested read or write operation when the polled value of the target register equals the requested value.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: April 9, 2013
    Assignee: International Business Machines Corporation
    Inventors: Etai Adar, Eric F. Robinson, Yossi Shapira
  • Patent number: 8412857
    Abstract: This document describes techniques (300, 600) and apparatuses (102, 106, 700, 800, 900) for peripheral authentication. These techniques (300, 600) and apparatuses (102, 106, 700, 800, 900) may configure data lines for authentication between host device (102) and peripheral (106), use these configured data lines to authenticate the peripheral (106), and then reconfigure the data lines for use. These techniques (300, 600) may also or instead transmit time stamps to a remote entity (402) for tracking peripheral use and/or present home screens (122) responsive to connection to a peripheral (106).
    Type: Grant
    Filed: December 31, 2010
    Date of Patent: April 2, 2013
    Assignee: Motorola Mobility LLC
    Inventors: Roger W. Ady, Sanjay Gupta, Jiri Slaby
  • Patent number: 8380903
    Abstract: Administering the polling of a number of devices for device status including determining whether a task identification for polling the device is in the delayed polling queue; if the task identification for polling the device is not in the delayed polling queue, determining whether the task identification for polling the device is in the immediate polling queue; if the task identification for polling the device is in the immediate polling queue; calculating a new time interval for polling the device in dependence upon a predetermined base period and a random selection of a time offset, wherein the time offset is within a predetermined range; calculating a next polling time for polling the device in dependence upon the current time and the new time interval; inserting the task identification in the delayed polling queue in dependence upon the next polling time.
    Type: Grant
    Filed: April 9, 2012
    Date of Patent: February 19, 2013
    Assignee: International Business Machines Corporation
    Inventors: Nicholas M. Williamson, Yin Jun Xu, Pu Yp Yang
  • Patent number: 8336108
    Abstract: A method and system for a communication network containing both trusted peers and untrusted hosts within the network. Trusted peers can collaborate with each other to observe and monitor the activity of the untrusted hosts. In addition, a trusted peer instantiated with a virtual machine can have an operating system kernel collaborate with a hypervisor to determine whether threats are present. A trusted peer that needs particular functionality installed can collaborate with other trusted peers and with an administrative console to have that functionality installed. An untrusted host can have a driver directly inserted into it by an administration console, which will facilitate in the collaboration process.
    Type: Grant
    Filed: October 4, 2007
    Date of Patent: December 18, 2012
    Assignee: Red Hat, Inc.
    Inventors: John M. Suit, Daniel Lee Becker, Vip Sharma, Mark James Yourcheck
  • Patent number: 8321872
    Abstract: Hardware resources sharing for a computer system running software tasks. A controller stores records including a mutex ID tag and a waiter flag in a cache. Lock and unlock registers are readable by the controller and loadable by the tasks with a mutex ID specifying a hardware resource. The controller monitors whether the lock register for loading with a mutex ID, and then determines whether it corresponds with the tag of a record in the cache. If so, it sets the record's waiter flag. If not, it adds a record having a tag corresponding with the mutex ID. The controller also monitors whether the unlock register for loading with a mutex ID, and then determines whether it corresponds with the tag of a record in the cache. If so, it determines whether that record's waiter flag is set and, if so, it clears that record from the cache.
    Type: Grant
    Filed: August 1, 2006
    Date of Patent: November 27, 2012
    Assignee: Nvidia Corporation
    Inventor: James R. Terrell, II
  • Patent number: 8321869
    Abstract: The present specification describes techniques and apparatus that enable synchronization using agent-based semaphores. In one or more implementations, a semaphore is used for a first agent to notify a second agent that the first agent has completed a particular task of a set of tasks and has completed using a shared resource for the particular task.
    Type: Grant
    Filed: July 31, 2009
    Date of Patent: November 27, 2012
    Assignee: Marvell International Ltd.
    Inventors: Junqiang Lan, Li Sha, Zhijian Lu, Ye Zhou
  • Patent number: 8244943
    Abstract: Administering the polling of a number of devices for device status including determining whether a task identification for polling the device is in the delayed polling queue; if the task identification for polling the device is not in the delayed polling queue, determining whether the task identification for polling the device is in the immediate polling queue; if the task identification for polling the device is in the immediate polling queue; calculating a new time interval for polling the device in dependence upon a predetermined base period and a random selection of a time offset, wherein the time offset is within a predetermined range; calculating a next polling time for polling the device in dependence upon the current time and the new time interval; inserting the task identification in the delayed polling queue in dependence upon the next polling time.
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: August 14, 2012
    Assignee: International Business Machines Corporation
    Inventors: Nicholas M. Williamson, Yin Jun Xu, Pu Yp Yang
  • Patent number: 8209689
    Abstract: A method and apparatus for avoiding live-lock during transaction execution is herein described. Counting logic is utilized to track successfully committed transactions for each processing element. When a data conflict is detected between transactions on multiple processing elements, priority is provided to the processing element with the lower counting logic value. Furthermore, if the values are the same, then the processing element with the lower identification value is given priority, i.e. allowed to continue while the other transaction is aborted. To avoid live-lock between processing elements that both have predetermined counting logic values, such as maximum counting values, when one processing element reaches the predetermined counting value all counters are reset. In addition, a failure at maximum value (FMV) counter may be provided to count a number of aborts of a transaction when counting logic is at a maximum value.
    Type: Grant
    Filed: September 12, 2007
    Date of Patent: June 26, 2012
    Assignee: Intel Corporation
    Inventors: Shlomo Raikin, Shay Gueron, Gad Sheaffer
  • Patent number: 8176181
    Abstract: A communications system and method comprises the steps of performing at least one Layer 2 transaction comprising a plurality of wave cycles, each Layer 2 transaction including performing a first wave cycle, concatenating the received first responses from each of the one or more nodes, and performing a second wave cycle. The first wave cycle includes broadcasting a first request from a network coordinator to a plurality of nodes connected to a coordinated network, and receiving a first response from one or more of the nodes indicating that the nodes have opted to participate in a next subsequent wave cycle. The second wave cycle includes transmitting a subsequent request from the network coordinator to each of the one or more nodes based upon the concatenated first responses.
    Type: Grant
    Filed: February 6, 2008
    Date of Patent: May 8, 2012
    Assignee: Entropic Communications, Inc.
    Inventors: Bradley Thomas Hyslop, Robert L. Hare, Jr., Inderjit Singh, Shlomo Ovadia, Ronald Lee
  • Patent number: 8169636
    Abstract: In a method, a computer, and computer program modules to transfer data between servers of a computer network, a computer program module supplying the data from a first server is provided, and a reading computer program module is provided that reads the supplied data, and wherein one of the following transmission modes is selected: 1) a complete storage of the data in a file occurs before the reading computer program module reads the data; 2) a segment-by-segment storage of the data in a file occurs such that the reading computer program module already begins with the reading of a segment while the supplying computer program module is still supplying data; and 3) a direct transmission of the data between the supplying computer program module and the reading computer program module occurs without buffering.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: May 1, 2012
    Assignee: Oce Printing Systems GmbH
    Inventors: Viktor Benz, Armin Gnaedig, Herman Lankreijer, Thomas Harms
  • Patent number: 8094642
    Abstract: The present invention provides a polling method in a radio digital communication system making it possible to shorten time required for polling without causing increase in an error rate and to efficiently manage and administrate communications. In a digital radio communication system for collecting information from a plurality of terminal stations by polling, a polling response signal to be transmitted from each terminal station to a base station has a frame format constructed of a one-frame in which a cyclic bit pattern is placed at a leading end of the frame format.
    Type: Grant
    Filed: September 14, 2010
    Date of Patent: January 10, 2012
    Assignee: Hitachi Kokusai Electric, Inc.
    Inventors: Kin'ichi Higure, Masayuki Kanazawa, Minoru Sakaihori, Yuzo Hiraki
  • Patent number: 7950014
    Abstract: Aspects of the subject matter described herein relate to detecting the ready state of a user interface element. In aspects, a synchronization object is created to indicate when a user interface element is ready. Data is then loaded into the user interface element. After the data is loaded, an indication is made via the synchronization object that the user interface element is ready. After this occurs, a thread waiting on the synchronization object may interact with the user interface element with confidence that the user interface element is ready.
    Type: Grant
    Filed: June 1, 2007
    Date of Patent: May 24, 2011
    Assignee: Microsoft Corporation
    Inventor: Ronald R. Martinsen
  • Patent number: 7949801
    Abstract: Coprocessor systems for using a main microprocessor DMA channel to write to a port to control a coprocessor system are provided. In certain examples, coprocessor systems are described using a main CPU counter to trigger a DMA channel to perform a single byte transfer to a port used to control coprocessor command timing.
    Type: Grant
    Filed: June 30, 2007
    Date of Patent: May 24, 2011
    Assignee: Pitney Bowes Inc.
    Inventors: George T. Monroe, Linda Dore, Michael LePore
  • Publication number: 20110078352
    Abstract: Administering the polling of a number of devices for device status including determining whether a task identification for polling the device is in the delayed polling queue; if the task identification for polling the device is not in the delayed polling queue, determining whether the task identification for polling the device is in the immediate polling queue; if the task identification for polling the device is in the immediate polling queue; calculating a new time interval for polling the device in dependence upon a predetermined base period and a random selection of a time offset, wherein the time offset is within a predetermined range; calculating a next polling time for polling the device in dependence upon the current time and the new time interval; inserting the task identification in the delayed polling queue in dependence upon the next polling time.
    Type: Application
    Filed: September 30, 2009
    Publication date: March 31, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Nicholas M. Williamson, Yin Jun Xu, Pu Yp Yang
  • Patent number: 7890597
    Abstract: Methods, systems, and products are disclosed for DMA transfer completion notification that include: inserting, by an origin DMA on an origin node in an origin injection FIFO, a data descriptor for an application message; inserting, by the origin DMA, a reflection descriptor in the origin injection FIFO, the reflection descriptor specifying a remote get operation for injecting a completion notification descriptor in a reflection injection FIFO on a reflection node; transferring, by the origin DMA to a target node, the message in dependence upon the data descriptor; in response to completing the message transfer, transferring, by the origin DMA to the reflection node, the completion notification descriptor in dependence upon the reflection descriptor; receiving, by the origin DMA from the reflection node, a completion packet; and notifying, by the origin DMA in response to receiving the completion packet, the origin node's processing core that the message transfer is complete.
    Type: Grant
    Filed: July 27, 2007
    Date of Patent: February 15, 2011
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Archer, Michael A. Blocksome, Jeffrey J. Parker
  • Patent number: 7844689
    Abstract: An apparatus, method, system, computer program and product are disclosed, each capable of managing a configuration request received via a network. Upon receiving a configuration right request form a client, a determination is made as to whether or not a configuration right can be issued. Based on the determination, the configuration right is issued to the client.
    Type: Grant
    Filed: January 20, 2006
    Date of Patent: November 30, 2010
    Assignee: Ricoh Company, Ltd.
    Inventors: Takashi Yoshikawa, Toru Matsuda
  • Publication number: 20100287309
    Abstract: The present invention may be related to a bridge for communications between a first computing device and a second computing device in a data communication system. The bridge may include a first interface, a second interface and a control module. The first interface may be adapted to couple with the first computing device. The second interface may be adapted to couple with the second computing device. The control module may be configured to process a file input/output (I/O) command from the first computing device so as to allow the first computing device to have access to at least one of data or resource of the second computing device via the first and second interfaces. Moreover, the control module may further include a parser, a decoder and a micro processor. The parser may be configured to identify whether the file I/O command includes an encoded controller command and retrieve the encoded controller command from the file I/O command if the file I/O command includes an encoded controller command.
    Type: Application
    Filed: July 20, 2009
    Publication date: November 11, 2010
    Applicant: OURS TECHNOLOGY INC.
    Inventors: Shen-Rui WU, Chiaming HSIAO