Abstract: A camera module is provided. The camera module comprises: a lens; a holder having a lower portion, the holder holding the lens; a circuit board; and an image sensing and processing unit including an image sensing device and an optional signal processing device stacked on and electrically connected to the image sensing device, the image sensing and processing unit being packaged on one side of the circuit board; wherein the holder is fixed on the circuit board, the image sensing and processing unit inside the lower portion of the holder. Further, if the circuit board is a flexible circuit board, then a hard plate can be disposed on the other side of the flexible PCB corresponding to the image sensing and processing unit in order to enhance the mechanical strength.

Abstract: The present invention provides a method for fabricating a quad flat no-lead package structure, comprising a chip carrier and at least a chip. The chip is disposed on the top surface of the chip carrier, while the back surface of the chip carrier includes a plurality of flat no-lead conductive leads as I/O pads of the chip carrier for the external circuitry. A plurality of pads, corresponding to bonding pads of the chip, is disposed on the top surface of the chip carrier. The aforementioned package structure can employ wiring bonding technology, flip chip technology or surface mount technology to attach the chip to the chip carrier.

Abstract: The present invention provides a QFN package structure, comprising a chip carrier and at least a chip. The chip is disposed on the top surface of the chip carrier, while the back surface of the chip carrier includes a plurality of flat no-lead conductive leads as I/O pads of the chip carrier for the external circuitry. A plurality of pads, corresponding to bonding pads of the chip, is disposed on the top surface of the chip carrier. The aforementioned package structure can employ wiring bonding technology, flip chip technology or surface mount technology to attach the chip to the chip carrier.

Abstract: A method for manufacturing gold bumps includes providing a substrate including a patterned protective layer, which exposes at least a bonding pad, on a surface, covering a photo resist on the surface of the substrate, performing a photolithography process to pattern the photo resist for exposing a portion of the protective layer and the bonding pad, removing a portion of the protective layer, removing the photo resist, and performing a gold bumping process. The resulting thickness of the protective layer covering the bonding pad is smaller than the resulting thickness of the protective layer covering the substrate.

Abstract: The present invention provides a method for fabricating a quad flat no-lead package structure, comprising a chip carrier and at least a chip. The chip is disposed on the top surface of the chip carrier, while the back surface of the chip carrier includes a plurality of flat no-lead conductive leads as I/O pads of the chip carrier for the external circuitry. A plurality of pads, corresponding to bonding pads of the chip, is disposed on the top surface of the chip carrier. The aforementioned package structure can employ wiring bonding technology, flip chip technology or surface mount technology to attach the chip to the chip carrier.

Abstract: An image sensor comprising an image sensing device layer, a silicon-on-insulator (SOI) layer, an optical device array and a substrate is provided. The SOI layer has a first surface and a second surface. The image sensing device layer is formed on the first surface of the SOI layer. The optical device array is formed on the second surface of the SOI layer. The substrate is disposed above the second surface of the SOI layer and the optical device array is disposed between the substrate and the SOI layer. An incident light coming from the outside environment, passes through the optical device array and the SOI layer, and is received by sensing devices formed in the image sensing device layer. In this manner, the probability of absorption or reflection of the incident light is reduced. Therefore, the sensing performance and the yield of the image sensor of the present invention is improved.

Abstract: An image sensor comprising an image sensing device layer, a silicon-on-insulator (SOI) layer, an optical device array and a substrate is provided. The SOI layer has a first surface and a second surface. The image sensing device layer is formed on the first surface of the SOI layer. The optical device array is formed on the second surface of the SOI layer. The substrate is disposed above the second surface of the SOI layer and the optical device array is disposed between the substrate and the SOI layer. An incident light coming from the outside environment, passes through the optical device array and the SOI layer, and is received by sensing devices formed in the image sensing device layer. In this manner, the probability of absorption or reflection of the incident light is reduced. Therefore, the sensing performance and the yield of the image sensor of the present invention is improved.

Abstract: A chip on photosensitive device package structure is provided. The package mainly comprises a photosensitive device, a transparent plate and a chip. The photosensitive device has an illumination area and a non-illumination area. The transparent plate has a first surface and a corresponding second surface. The transparent plate is set over the photosensitive device with the first surface covering both the illumination area and the non-illumination area. The chip is set on the second surface of the transparent plate above the non-illumination area of the photosensitive device.

Abstract: A camera module is provided. The camera module comprises: a lens; a holder having a lower portion, the holder holding the lens; a circuit board; and an image sensing and processing unit including an image sensing device and an optional signal processing device stacked on and electrically connected to the image sensing device, the image sensing and processing unit being packaged on one side of the circuit board; wherein the holder is fixed on the circuit board, the image sensing and processing unit inside the lower portion of the holder. Further, if the circuit board is a flexible circuit board, then a hard plate can be disposed on the other side of the flexible PCB corresponding to the image sensing and processing unit in order to enhance the mechanical strength.

Abstract: A chip on photosensitive device package structure is provided. The package mainly comprises a photosensitive device, a transparent plate and a chip. The photosensitive device has an illumination area and a non-illumination area. The transparent plate has a first surface and a corresponding second surface. The transparent plate is set over the photosensitive device with the first surface covering both the illumination area and the non-illumination area. The chip is set on the second surface of the transparent plate above the non-illumination area of the photosensitive device.

Abstract: A package structure for optical image sensing devices is disclosed. The package structure includes an image sensing integrated circuit chip having a light receiving side and a backside. The image sensing integrated circuit chip has a light sensing area on the light receiving side. A plurality of light sensing devices are arranged in the light sensing area for converting incident light into electrical signals. A plurality of bonding pads are arranged along one or two sides of the light sensing area. Black sealing glue is asymmetrically coated on the outskirts of the light sensing area. The black sealing glue has at least two coating widths. A glass lid is glued over the light sensing area with the sealing glue.

Abstract: A process for fabricating a semiconductor device is provided. The process integrates a cutting film process into the front-end of semiconductor process. The cutting film is directly formed on the curved surface of the micro-lens or a passivation layer is formed on the micro-lens before covering the passivation layer with the cutting film. In addition to micro-particle contamination due to sawing, the process is able to simplify chip packaging and reduce the size of a photosensitive module.

Abstract: A process for fabricating a semiconductor device is provided. The process integrates a cutting film process into the front-end of semiconductor process. The cutting film is directly formed on the curved surface of the micro-lens or a passivation layer is formed on the micro-lens before covering the passivation layer with the cutting film. In addition to micro-particle contamination due to sawing, the process is able to simplify chip packaging and reduce the size of a photosensitive module.

Abstract: The present invention provides a QFN package structure, comprising a chip carrier and at least a chip. The chip is disposed on the top surface of the chip carrier, while the back surface of the chip carrier includes a plurality of flat no-lead conductive leads as I/O pads of the chip carrier for the external circuitry. A plurality of pads, corresponding to bonding pads of the chip, is disposed on the top surface of the chip carrier. The aforementioned package structure can employ wiring bonding technology, flip chip technology or surface mount technology to attach the chip to the chip carrier.

Abstract: A process for fabricating a semiconductor device is provided. The process integrates a cutting film process into the front-end of semiconductor process. The cutting film is directly formed on the curved surface of the micro-lens or a passivation layer is formed on the micro-lens before covering the passivation layer with the cutting film. In addition to micro-particle contamination due to sawing, the process is able to simplify chip packaging and reduce the size of a photosensitive module.