Patents by Inventor Lawrence Tze-Leung Tse

Lawrence Tze-Leung Tse has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130038289
    Abstract: A battery-cell converter (BCC) management system is disclosed. The BCC system comprises one or more battery-cell converter units that are configured to provide regulated main power output from the outputs of DC/DC converters inside the battery-cell converter units. Each battery-cell converter unit comprises an electrical energy storage cell bank, one or more DC/DC converters, one or more electrical connection devices and a monitor and control module coupled to other components of the battery-cell converter unit. Multiple battery-cell converter units can be stacked in series to increase output voltage. In another embodiment, multiple battery-cell converter units can be connected in parallel to increase output current. Accordingly, the BCC management system disclosed improves battery pack usage efficiencies, increase battery pack useable time per charge, extend battery pack life-time as well as lower battery pack manufacturing cost.
    Type: Application
    Filed: October 13, 2012
    Publication date: February 14, 2013
    Inventor: Lawrence Tze-Leung Tse
  • Publication number: 20100213897
    Abstract: A battery cell converter (BCC) unit including one or more energy-storing battery cells coupled to one or more DC/DC converters is disclosed. A management unit can monitor and control the charging and discharging of each battery cells; including monitoring of voltages & State-of-Charge of each cell as well as controlling the switching of the DC/DC converters. The combined power and cell switching algorithms optimizes the charging and discharging process of the battery cells. A compound battery cell converter system comprising a series stack of BCCs to achieve high effective converter output voltage is also disclosed. The new proposed Battery Cell Converter architecture will enable improvements in battery pack usage efficiencies, will increase battery pack useable time per charge, will extend battery pack life-time and will lower battery pack manufacturing cost.
    Type: Application
    Filed: February 20, 2010
    Publication date: August 26, 2010
    Inventor: Lawrence Tze-Leung Tse
  • Patent number: 6169533
    Abstract: A high speed analog color key detection system is disclosed for video/graphics mixing that employs a high speed analog strobe comparator to compare the analog version of a pre-defined color key value to the stream of pixel values in an incoming analog graphics signal. When the comparator indicates a match, the display signal is switched from the analog graphics signal to an incoming analog video signal, enabling the analog video signal to be displayed within a graphics window. Comparisons are triggered by active transitions of a strobe signal with a frequency that is an integer k multiple of the frequency at which the pixel values are generated by a graphics card. Oversampling strobe signals (where the integer k is greater than one) enable comparisons to be performed on small segments of fat pixel values. The strobe signal is generated using a phase locked loop that is synchronized with a horizontal synchronization signal provided by the graphics card.
    Type: Grant
    Filed: April 25, 1997
    Date of Patent: January 2, 2001
    Assignee: Chrontel, Inc.
    Inventor: Lawrence Tze-Leung Tse
  • Patent number: 6144249
    Abstract: A clock-referenced switching bias current source is disclosed wherein an accurate bias current is established based on the charge dissipated by a switching capacitor over a predetermined period. The time period is established by a very accurate system clock. The value of the capacitor can be accurately selected with .+-.10%. By selecting a particular capacitance and frequency, a desired average bias current value is determined according to the amount of charge dissipated over the predetermined period. In different embodiments, the bias current source can be configured to provide a bandgap current that is temperature and/or process independent.
    Type: Grant
    Filed: January 15, 1998
    Date of Patent: November 7, 2000
    Assignee: Chrontel, Inc.
    Inventor: Lawrence Tze-Leung Tse
  • Patent number: 5900623
    Abstract: An active pixel sensor implemented with CMOS technology that employs a plurality of photocells, each including a photodiode to sense illumination and a separate storage node with a stored charge that is discharged during an integration period by the photocurrent generated by the photodiode. Each photocell includes a switching network that couples the photocurrent to the storage node only during the integration period while ensuring that a relatively constant voltage is maintained across the photodiode during integration and non-integration periods. The transistors in the switching network operate in a forward active subthreshold region, ensuring linear operation and the diode voltage is clamped to a small positive voltage so that the diode is always reverse-biased. A source-follower generates a output signal correlated to the charge on the storage node that is coupled to column output circuitry that samples the signal.
    Type: Grant
    Filed: August 11, 1997
    Date of Patent: May 4, 1999
    Assignee: Chrontel, Inc.
    Inventors: Randy P.L. Tsang, Lawrence Tze-Leung Tse, Timothy J. Donovan, King Cheung Yen
  • Patent number: 5708481
    Abstract: A color space converter is implemented using current mode analog circuitry to efficiently transform video data from a YC.sub.b C.sub.r format to an RGB format in order to allow the display of video signals on a color monitor. The analog current-mode circuitry is implemented in an integrated circuit that will operate at high clock rates and can be integrated in a small die area so as to reduce its cost. The color space converter includes Y, C.sub.b and C.sub.r current-mode conversion circuits to compute Y, C.sub.b and C.sub.r contributions to the G, R and B signals, and current-mode adders that add those contributions to the G, R and B signals to generate the G, R and B signals. Each conversion circuit includes (A) a respective folded cascode structure having an input coupled to a respective analog Y, C.sub.b or C.sub.r signal, each conversion circuit generating a respective Y, C.sub.b or C.sub.r current output; (B) at least one respective current mirror that generates from the Y, C.sub.b or C.sub.
    Type: Grant
    Filed: July 31, 1996
    Date of Patent: January 13, 1998
    Assignee: Chrontel, Inc.
    Inventors: Lawrence Tze-Leung Tse, King Cheung Yen