Abstract: An electronic device comprises a stack comprising an alternating sequence of conductive structures and insulative structures arranged in tiers, and at least one dielectric-filled slot extending vertically through the stack and extending in a first horizontal direction. The at least one dielectric-filled slot is defined between two internal sidewalls of the stack. The electronic device comprises additional dielectric-filled slots extending vertically through the stack and extending in a second horizontal direction transverse to the first horizontal direction, and isolation structures laterally interposed between the at least one dielectric-filled slot and the additional dielectric-filled slots. The isolation structures are laterally adjacent to the conductive structures of the stack, and at least some of the isolation structures are vertically adjacent to the insulative structures of the stack. Related systems and methods of forming the electronic devices are also disclosed.

Abstract: An electronic component having an image sensing device (41, 71, 86, 132, 182, 212) and a method for improving pixel charge transfer in the image sensing device (41, 71, 86, 132, 182, 212). The image sensing device (41, 71, 86, 132, 182, 212) has a transfer gate (42, 82) between a source region (43, 83) and an image sensing region. The image sensing region is formed to have a wider device width proximate to the transfer gate (42, 82) than at a point distal from the transfer gate (42, 82).

Abstract: An image sensor (10) has an image sensing element that includes an N-type conducting region (26) and a P-type pinned layer (37). The two regions form two P-N junctions at different depths that increase the efficiency of charge carrier collection at different frequencies of light. The conducting region (26) is formed by an angle implant that ensures that a portion of the conducting region (26) can function as a source of a MOS transistor (32).

Abstract: An image sensor (10) has an image sensing element that includes an N-type conducting region (26) and a P-type pinned layer (37). The two regions form two P-N junctions at different depths that increase the efficiency of charge carrier collection at different frequencies of light. The conducting region (26) is formed by an angle implant that ensures that a portion of the conducting region (26) can function as a source of an MOS transistor (32).

Abstract: An image sensor (10) has an image sensing element that includes an N-type conducting region (26) and a P-type pinned layer (37). The two regions form two P-N junctions at different depths that increase the efficiency of charge carrier collection at different frequencies of light. The conducting region (26) is formed by an angle implant that ensures that a portion of the conducting region (26) can function as a source of an MOS transistor (32).

Abstract: A semiconductor process is provided for the formation of a very low resistance contact. After a straight wall contact is formed conventionally above a silicon substrate, a blanket metal barrier layer is deposited. A plurality of planar polysilicon layers are deposited above the metal barrier layer. The polysilicon layers have varying doping levels and are etched away. A byproduct gas of the etch reaction is monitored and the transition between polysilicon layers can be accurately noted. In this way, a layer of doped polysilicon is left above the metal barrier in the contact region. Metal may then be patterned over the entire structure to provide a low resistance reliable contact.