Patents by Inventor Sabrina E. Kemeny
Sabrina E. Kemeny has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7567291Abstract: A vehicle viewing system including a camera system for generating a signal corresponding to a scene by integrating light from the scene incident on pixel cells having a variable integration time, a display system for presenting a visual representation of the scene, and a processor system operable to determine the camera system integration time based on brightness levels in the scene. The camera system preferably includes and an input attenuating filter to limit light striking the optical array. The processor system includes an image brightness detector to determine overall image brightness and a display control to determine luminance settings for the display system. The processor system may determine the intensity of the display system based on the brightness of the scene, ambient light levels, and glare on the display. The display system includes a display and a display attenuation filter for limiting the intensity as viewed by the operator.Type: GrantFiled: September 27, 2002Date of Patent: July 28, 2009Assignee: Gentex CorporationInventors: Jon H. Bechtel, Joseph S. Stam, Eric R. Fossum, Sabrina E. Kemeny
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Method of acquiring an image from an optical structure having pixels with dedicated readout circuits
Patent number: 7105371Abstract: An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.Type: GrantFiled: November 12, 2003Date of Patent: September 12, 2006Assignee: California Institute of TechnologyInventors: Eric R. Fossum, Sunetra Mendis, Sabrina E. Kemeny -
Patent number: 6943838Abstract: An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. A Simple Floating Gate (SFG) pixel structure could also be employed in the imager to provide a non-destructive readout and smaller pixel sizes.Type: GrantFiled: December 26, 2000Date of Patent: September 13, 2005Assignee: California Institute of TechnologyInventors: Eric R. Fossum, Junichi Nakamura, Sabrina E. Kemeny
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Publication number: 20040160522Abstract: An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.Type: ApplicationFiled: November 12, 2003Publication date: August 19, 2004Applicant: California Institute of TechnologyInventors: Eric R. Fossum, Sunetra Mendis, Sabrina E. Kemeny
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Patent number: 6744068Abstract: An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.Type: GrantFiled: March 12, 2003Date of Patent: June 1, 2004Assignee: California Institute of TechnologyInventors: Eric R. Fossum, Sunetra Mendis, Sabrina E. Kemeny
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Publication number: 20030160238Abstract: An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.Type: ApplicationFiled: March 12, 2003Publication date: August 28, 2003Applicant: California Institute of Technology, a California corporationInventors: Eric R. Fossum, Sunetra Mendis, Sabrina E. Kemeny
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Publication number: 20030103141Abstract: A vehicle viewing system including a camera system for generating a signal corresponding to a scene by integrating light from the scene incident on pixel cells having a variable integration time, a display system for presenting a visual representation of the scene, and a processor system operable to determine the camera system integration time based on brightness levels in the scene. The camera system preferably includes and an input attenuating filter to limit light striking the optical array. The processor system includes an image brightness detector to determine overall image brightness and a display control to determine luminance settings for the display system. The processor system may determine the intensity of the display system based on the brightness of the scene, ambient light levels, and glare on the display. The display system includes a display and a display attenuation filter for limiting the intensity as viewed by the operator.Type: ApplicationFiled: September 27, 2002Publication date: June 5, 2003Inventors: Jon H. Bechtel, Joseph S. Stam, Eric R. Fossum, Sabrina E. Kemeny
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Patent number: 6555842Abstract: An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.Type: GrantFiled: June 27, 2000Date of Patent: April 29, 2003Assignee: California Institute of TechnologyInventors: Eric R. Fossum, Sunetra Mendis, Sabrina E. Kemeny
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Publication number: 20010002848Abstract: An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. A Simple Floating Gate (SFG) pixel structure could also be employed in the imager to provide a non-destructive readout and smaller pixel sizes.Type: ApplicationFiled: December 26, 2000Publication date: June 7, 2001Applicant: California Institute of TechnologyInventors: Eric R. Fossum, Junichi Nakamura, Sabrina E. Kemeny
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Patent number: 6166768Abstract: An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. A Simple Floating Gate (SFG) pixel structure could also be employed in the imager to provide a non-destructive readout and smaller pixel sizes.Type: GrantFiled: January 22, 1997Date of Patent: December 26, 2000Assignee: California Institute of TechnologyInventors: Eric R. Fossum, Junichi Nakamura, Sabrina E. Kemeny
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Patent number: 6101232Abstract: An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.Type: GrantFiled: November 16, 1995Date of Patent: August 8, 2000Assignee: California Institute of TechnologyInventors: Eric R. Fossum, Sunetra Mendis, Sabrina E. Kemeny
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Patent number: 6008486Abstract: A system and method is described for increasing effective integration time of an optical sensor including holding a first signal within each pixel cell, proportional to light integrated by the pixel cell over the previous frame period, generating a second signal within each pixel cell proportional to light integrated by the pixel cell over the current frame period, and summing the first signal and the second signal from each pixel, thereby producing an output signal representing the light integrated by each pixel over two frame periods.Type: GrantFiled: December 31, 1997Date of Patent: December 28, 1999Assignee: Gentex CorporationInventors: Joseph S. Stam, Jon H. Bechtel, Eric R. Fossum, Sabrina E. Kemeny
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Patent number: 5990506Abstract: A semiconductor imaging system preferably having an active pixel sensor array compatible with a CMOS fabrication process. Color-filtering elements such as polymer filters and wavelength-converting phosphors can be integrated with the image sensor.Type: GrantFiled: March 20, 1997Date of Patent: November 23, 1999Assignee: California Institute of TechnologyInventors: Eric R. Fossum, Sabrina E. Kemeny
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Patent number: 5949483Abstract: An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. The imaging device can also include an electronic shutter formed on the substrate adjacent the photogate, and/or a storage section to allow for simultaneous integration.Type: GrantFiled: January 22, 1997Date of Patent: September 7, 1999Assignee: California Institute of TechnologyInventors: Eric R. Fossum, Sabrina E. Kemeny, Bedabrata Pain
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Patent number: 5548773Abstract: The invention computes the optimum path across a terrain or topology represented by an array of parallel processor cells interconnected between neighboring cells by links extending along different directions to the neighboring cells. Such an array is preferably implemented as a high-speed integrated circuit. The computation of the optimum path is accomplished by, in each cell, receiving stimulus signals from neighboring cells along corresponding directions, determining and storing the identity of a direction along which the first stimulus signal is received, broadcasting a subsequent stimulus signal to the neighboring cells after a predetermined delay time, whereby stimulus signals propagate throughout the array from a starting one of the cells. After propagation of the stimulus signals throughout the array, a master processor traces back from a selected destination cell to the starting cell along an optimum path of the cells in accordance with the identity of the directions stored in each of the cells.Type: GrantFiled: March 30, 1993Date of Patent: August 20, 1996Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space AdministrationInventors: Sabrina E. Kemeny, Eric R. Fossum, Robert H. Nixon
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Patent number: 5471515Abstract: An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.Type: GrantFiled: January 28, 1994Date of Patent: November 28, 1995Assignee: California Institute of TechnologyInventors: Eric R. Fossum, Sunetra Mendis, Sabrina E. Kemeny
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Patent number: 5055900Abstract: A charge-coupled device (CCD) is formed by first defining relatively deep trenches having relatively small lateral dimensions in the surface of a silicon bulk region. A relatively thin silicon dioxide layer is formed over the silicon surface and inside each trench to cover the internal surfaces thereof. Finally, respective conducting electrode layers are formed over each trench covering the silicon dioxide layer within the trench. Such a CCD structure provides improved packing density and versatility of function over a conventional surface electrode CCD structures. When used in an image-sensing device, the trench-defined CCD structure provides improved quantum efficiency, owing to the deeper potential wells which may be formed in such structures for capturing photogenerated charge carriers.Type: GrantFiled: October 11, 1989Date of Patent: October 8, 1991Assignee: The Trustees of Columbia University in the City of New YorkInventors: Eric R. Fossum, Sabrina E. Kemeny