Patents by Inventor Wei Hsu
Wei Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240179311Abstract: A method and apparatus for block partition are disclosed. If a cross-colour component prediction mode is allowed, the luma block and the chroma block are partitioned into one or more luma leaf blocks and chroma leaf blocks. If a cross-colour component prediction mode is allowed, whether to enable an LM (Linear Model) mode for a target chroma leaf block is determined based on a first split type applied to an ancestor chroma node of the target chroma leaf block and a second split type applied to a corresponding ancestor luma node. According to another method, after the luma block and the chroma block are partitioned using different partition tress, determine whether one or more exception conditions to allow an LM for a target chroma leaf block are satisfied when the chroma partition tree uses a different split type, a different partition direction, or both from the luma partition tree.Type: ApplicationFiled: February 5, 2024Publication date: May 30, 2024Inventors: Chia-Ming TSAI, Tzu-Der CHUANG, Chih-Wei HSU, Ching-Yeh CHEN, Zhi-Yi LIN
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Publication number: 20240178264Abstract: An integrated circuit includes a photodetector. The photodetector includes one or more dielectric structures positioned in a trench in a semiconductor substrate. The photodetector includes a photosensitive material positioned in the trench and covering the one or more dielectric structures. A dielectric layer covers the photosensitive material. The photosensitive material has an index of refraction that is greater than the indices of refraction of the dielectric structures and the dielectric layer.Type: ApplicationFiled: February 7, 2024Publication date: May 30, 2024Inventors: Chun-Wei HSU, Tsai-Hao HUNG, Chung-Yu LIN, Ying-Hsun CHEN
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Publication number: 20240176093Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.Type: ApplicationFiled: February 5, 2024Publication date: May 30, 2024Inventors: Chao-Chang HU, Chih-Wei WENG, Chia-Che WU, Chien-Yu KAO, Hsiao-Hsin HU, He-Ling CHANG, Chao-Hsi WANG, Chen-Hsien FAN, Che-Wei CHANG, Mao-Gen JIAN, Sung-Mao TSAI, Wei-Jhe SHEN, Yung-Ping YANG, Sin-Hong LIN, Tzu-Yu CHANG, Sin-Jhong SONG, Shang-Yu HSU, Meng-Ting LIN, Shih-Wei HUNG, Yu-Huai LIAO, Mao-Kuo HSU, Hsueh-Ju LU, Ching-Chieh HUANG, Chih-Wen CHIANG, Yu-Chiao LO, Ying-Jen WANG, Shu-Shan CHEN, Che-Hsiang CHIU
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Publication number: 20240175464Abstract: A hinge is connectable with two housing shells for permitting relative opening and closing of the housing shells, and includes a fixed seat, at least two rotating units, two lateral support plates and a center support plate. The rotating units are disposed at two sides of a centerline of the fixed seat and are connectable with the housing shells. The rotating units are shiftable between an open state and a closed state. Each rotating unit includes a linking member arcuately slidable on the fixed seat. The lateral support plates are mounted on the linking members, and have central notches. The center support plate is movably disposed on the fixed seat and is moved with the rotating units. In the open state, the center support plate is disposed in the central notches. In the closed state, the center support plate abuts against the fixed seat.Type: ApplicationFiled: January 10, 2023Publication date: May 30, 2024Applicant: FOSITEK CORPORATIONInventors: An-Szu HSU, An-Wei CHUNG
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Publication number: 20240175463Abstract: A hinge is connectable with two housing shells for permitting relative folding and unfolding of the housing shells, and includes a fixed seat, at least two rotating units, two lateral support plates and at least one synchronous driving unit. The rotating units are shiftable between an open state and a closed state. Each rotating unit includes a linking member fittingly and arcuately slidable on the fixed seat, a sliding member fittingly and arcuately slidable on the linking member, and a rotary bracket pivotably mounted on the fixed seat and inclinedly slidable on the sliding member. The lateral support plates are respectively mounted on the linking members. The synchronous driving unit includes two inboard pinions and two outboard pinions arranged laterally to mesh with bracket toothed portions of the rotary brackets to make synchronous rotation of the rotary brackets in opposite rotational directions.Type: ApplicationFiled: January 6, 2023Publication date: May 30, 2024Applicant: FOSITEK CORPORATIONInventors: An-Szu HSU, An-Wei CHUNG
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Patent number: 11996334Abstract: A method includes providing a first channel layer and a second channel layer over a substrate; forming a first patterned hard mask covering the first channel layer and exposing the second channel layer; selectively depositing a cladding layer on the second channel layer and not on the first patterned hard mask; performing a first thermal drive-in process; removing the first patterned hard mask; after removing the first patterned hard mask, forming an interfacial dielectric layer on the cladding layer and the first channel layer; and forming a high-k dielectric layer on the interfacial dielectric layer.Type: GrantFiled: December 20, 2022Date of Patent: May 28, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chung-Wei Hsu, Kuo-Cheng Chiang, Mao-Lin Huang, Lung-Kun Chu, Jia-Ni Yu, Kuan-Lun Cheng, Chih-Hao Wang
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Patent number: 11996325Abstract: A device includes a substrate, a first dielectric layer over the substrate, a first conductive feature in the first dielectric layer, and an etch stop layer over the first dielectric layer. The etch stop layer includes metal-doped aluminum nitride. The device further includes a second dielectric layer over the etch stop layer, and a second conductive feature in the second dielectric layer. The second conductive feature extends into the etch stop layer and contacts the first conductive feature.Type: GrantFiled: July 29, 2020Date of Patent: May 28, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chia-Ching Tsai, Yi-Wei Chiu, Li-Te Hsu
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Patent number: 11997266Abstract: Methods and apparatus for loop-filter processing of reconstructed video are disclosed. According to one method, multiple CC-ALF (Cross-Component Adaptive Loop Filter) filters are used. Selection of the multiple CC-ALF filters can be signalled in one APS (Adaptation Parameter Set). According to another method, the CC-ALF can be implemented according to the difference between a to-be-process sample and its neighbouring sample.Type: GrantFiled: July 24, 2020Date of Patent: May 28, 2024Assignee: HFI INNOVATION INC.Inventors: Yu-Wen Huang, Chih-Wei Hsu, Ching-Yeh Chen, Tzu-Der Chuang, Shaw-Min Lei
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Patent number: 11997311Abstract: Video processing methods and apparatuses for coding a current block generate a final predictor by combining multiple predictors of the current block. One of the predictors for the current block is a motion compensated predictor, which is generated according to one candidate selected from a first candidate list. The construction of the first candidate list includes deriving an average candidate by averaging motion information of existing candidates in the first candidate list. A second predictor for the current block is another motion compensated predictor or an intra predictor.Type: GrantFiled: September 17, 2019Date of Patent: May 28, 2024Assignee: HFI INNOVATION INC.Inventors: Man-Shu Chiang, Chih-Wei Hsu
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Patent number: 11996466Abstract: A method of forming a gas spacer in a semiconductor device and a semiconductor device including the same are disclosed. In accordance with an embodiment, a method includes forming a gate stack over a substrate; forming a first gate spacer on sidewalls of the gate stack; forming a second gate spacer on sidewalls of the first gate spacer; removing the second gate spacer using an etching process to form a first opening, the etching process being performed at a temperature less than 0° C., the etching process using an etching solution including hydrogen fluoride; and depositing a dielectric layer over the first gate spacer and the gate stack, the dielectric layer sealing a gas spacer in the first opening.Type: GrantFiled: May 9, 2022Date of Patent: May 28, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chen-Huang Huang, Ming-Jhe Sie, Cheng-Chung Chang, Shao-Hua Hsu, Shu-Uei Jang, An Chyi Wei, Shiang-Bau Wang, Ryan Chia-Jen Chen
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Patent number: 11996484Abstract: A semiconductor device includes a substrate, two source/drain features over the substrate, channel layers connecting the two source/drain features, and a gate structure wrapping around each of the channel layers. Each of the two source/drain features include a first epitaxial layer, a second epitaxial layer over the first epitaxial layer, and a third epitaxial layer on inner surfaces of the second epitaxial layer. The channel layers directly interface with the second epitaxial layers and are separated from the third epitaxial layers by the second epitaxial layers. The first epitaxial layers include a first semiconductor material with a first dopant. The second epitaxial layers include the first semiconductor material with a second dopant. The second dopant has a higher mobility than the first dopant.Type: GrantFiled: May 13, 2021Date of Patent: May 28, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shih-Hao Lin, Chih-Hsuan Chen, Chia-Hao Pao, Chih-Chuan Yang, Chih-Yu Hsu, Hsin-Wen Su, Chia-Wei Chen
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Publication number: 20240164754Abstract: Ultrasound transducer assemblies and associated systems and method are disclosed herein. In one embodiment, an ultrasound transducer assembly includes at least one matching layer overlies a transducer layer. A plurality of kerfs extends at least into the matching layer. In some aspects, the kerfs are at least partially filled with a filler material that includes microballoons and/or microspheres.Type: ApplicationFiled: January 26, 2024Publication date: May 23, 2024Inventors: Wei Li, Gregg Frey, Simon Hsu
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Publication number: 20240166807Abstract: A polyethylene terephthalate (PET) copolyester and a manufacturing method thereof are provided. The manufacturing method includes the following steps. A dispersion slurry including a talcum powder is formulated, wherein the talcum powder has an average particle size of 1 ?m to 50 ?m and an average specific surface area of 7 m2/g to 20 m2/g. Next, a terephthalic acid and an ethylene glycol are mixed, and the dispersion slurry and a crystallization accelerator are introduced, so as to carry out a transesterification reaction and therefore form a bis-2-hydroxylethyl terephthalate (BHET). Afterwards, a prepolymerization reaction and a polycondensation reaction are carried out to form a polyethylene terephthalate (PET) copolyester.Type: ApplicationFiled: December 30, 2022Publication date: May 23, 2024Applicant: NAN YA PLASTICS CORPORATIONInventors: Te-Chao Liao, Han-Ching Hsu, Chen-Wei Chang
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Publication number: 20240170381Abstract: In some implementations, one or more semiconductor processing tools may form a metal cap on a metal gate. The one or more semiconductor processing tools may form one or more dielectric layers on the metal cap. The one or more semiconductor processing tools may form a recess to the metal cap within the one or more dielectric layers. The one or more semiconductor processing tools may perform a bottom-up deposition of metal material on the metal cap to form a metal plug within the recess and directly on the metal cap.Type: ApplicationFiled: February 1, 2024Publication date: May 23, 2024Inventors: Chun-Hsien HUANG, Peng-Fu HSU, Yu-Syuan CAI, Min-Hsiu HUNG, Chen-Yuan KAO, Ken-Yu CHANG, Chun-I TSAI, Chia-Han LAI, Chih-Wei CHANG, Ming-Hsing TSAI
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Publication number: 20240168818Abstract: A computing task dispatching method, a terminal electronic device and a computing system using the same are provided. The computing task dispatching method includes the following steps. At least one terminal electronic device monitors a terminal hardware resource usage information of a plurality of sub-tasks. According to the terminal hardware resource usage information, a work dispatching decision is determined to dispatch the sub-tasks to the terminal electronic device or an edge server. The work dispatching decision is used to increase or maximize a utilization rate of the terminal electronic device. The work dispatching decisions is executed.Type: ApplicationFiled: December 21, 2022Publication date: May 23, 2024Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chen-Chia HSU, Che-Wei SUNG, Chien-Chang CHEN
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Publication number: 20240170225Abstract: This invention describes a packaging structure for roll-type (wound-type) aluminum conductive polymer capacitor element. Two protective substrates are applied to sandwich a roll-type capacitor element in between with an insulating material surrounding the capacitor element also in between the protective substrates. The protective substrates comprise electrically separated anodic conductive pad and cathodic conductive pad on their surfaces and through holes that pass through the conductive pads. The capacitor element is oriented with its axis perpendicular to the two substrates. The anodic and cathodic leads of the capacitor element pass through the through holes. An anodic external terminal is plated over the anodic conductive pad and a cathodic external terminal is plated over the cathodic conductive pad so that the anodic external terminal is electrically connected to the anodic lead and the cathodic external terminal is electrically connected to the cathodic lead.Type: ApplicationFiled: November 22, 2022Publication date: May 23, 2024Inventors: Yu-Peng Chung, Chia-Wei Li, Wen Cheng Hsu, En-Ming Chen, Che-Chih Tsao
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Patent number: 11991393Abstract: Video processing methods and apparatuses in a video encoding or decoding system for transforming residuals of transform blocks into final transform coefficients or inverse transforming final transform coefficients into residuals. In order to solve the latency issue, exemplary embodiments check if a width or height of a coding block is larger than a predefined threshold, and disable secondary transform or inverse secondary transform for any transform block within the coding block if the width or height of the coding block is larger than the predefined threshold. Another embodiment checks if there are multiple transform blocks in a coding block, and disables secondary transform or inverse secondary transform if the coding block contains multiple transform blocks.Type: GrantFiled: April 15, 2020Date of Patent: May 21, 2024Assignee: HFI INNOVATION INC.Inventors: Man-Shu Chiang, Chih-Wei Hsu, Tzu-Der Chuang, Ching-Yeh Chen
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Patent number: 11990167Abstract: A semiconductor device and a method of forming the same are provided. The method includes forming a bottom electrode layer over a substrate. A magnetic tunnel junction (MTJ) layers are formed over the bottom electrode layer. A top electrode layer is formed over the MTJ layers. The top electrode layer is patterned. After patterning the top electrode layer, one or more process cycles are performed on the MTJ layers and the bottom electrode layer. A patterned top electrode layer, patterned MTJ layers and a patterned bottom electrode layer form MTJ structures. Each of the one or more process cycles includes performing an etching process on the MTJ layers and the bottom electrode layer for a first duration and performing a magnetic treatment on the MTJ layers and the bottom electrode layer for a second duration.Type: GrantFiled: June 21, 2021Date of Patent: May 21, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Bo-Jhih Shen, Kuang-I Liu, Joung-Wei Liou, Jinn-Kwei Liang, Yi-Wei Chiu, Chin-Hsing Lin, Li-Te Hsu, Han-Ting Tsai, Cheng-Yi Wu, Shih-Ho Lin
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Patent number: 11989373Abstract: A circuit to cancel the effect of parasitic capacitances (“initial signals”) in calculations as to precise touch locations on a touch display screen (signal compensation circuit) includes first and second compensation circuits connected to a charge-discharge node. The first compensation circuit receives initial signals, generates first charging currents to charge, and first discharging currents to discharge, the charging-discharging node. The second compensation circuit generates second charging currents to charge, and second discharging currents to discharge, the charging-discharging node. Values of the first charging currents, the second charging currents, the first discharging currents, and the second discharging currents are of different magnitudes and are applied in order to amount to a more precise match for the exact compensation value required.Type: GrantFiled: September 13, 2021Date of Patent: May 21, 2024Assignee: JADARD TECHNOLOGY INC.Inventors: Feng-Wei Lin, Yu-Chieh Hsu, Long Chen
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Patent number: D1027976Type: GrantFiled: May 24, 2021Date of Patent: May 21, 2024Assignee: VIVOTEK INC.Inventors: Kuan-Hung Chen, Kai-Sheng Chuang, Chia-Chi Chang, Yu-Fang Huang, Kai-Ting Yu, Wen-Chun Chen, Shu-Jung Hsu, Tsao-Wei Hung