Abstract: A collision avoidance system for a machine is disclosed. The collision avoidance system has a first obstacle detection system. The first obstacle detection system is configured to detect a first obstacle and generate a corresponding first signal. Additionally, the collision avoidance system has an operator interface. The operator interface has a display configured to communicate visual information to an operator. The operator interface also has an input device configured to receive selections from the operator and generate a corresponding second signal. In addition, the collision avoidance system has a controller. The controller is in communication with the first obstacle detection system and the operator interface. The controller is configured to control the display to provide a first dangerous obstacle warning to the operator, based on the first signal.

Abstract: A collision avoidance system for a machine is disclosed. The collision avoidance system has a first obstacle detection system. The first obstacle detection system is configured to detect a first obstacle and generate a corresponding first signal. Additionally, the collision avoidance system has an operator interface. The operator interface has a display configured to communicate visual information to an operator. In addition, the collision avoidance system has an interface module configured to detect a status of the machine and generate a corresponding second signal. The collision avoidance system also has a controller. The controller is in communication with the first obstacle detection system, the operator interface, and the interface module. The controller is configured to control the display to indicate a dangerous obstacle detection to the operator, based on the first and second signals.

Abstract: The present invention provides a system and methodology for dummy-dispensing resist though a dispense head while mitigating waste associated with the dummy-dispense process. The dummy dispensed resist is returned to a reservoir from which it was taken. Between substrate applications, the dispense head can be positioned to dispense resist into a return line. The flow of resist from the dispense head keeps resist from drying at the dispense head. By funneling the dummy-dispensed resist into a return line with low volume, for example, waste from the dummy-dispensing process can be mitigated.

Abstract: A computing environment can dynamically respond to user preferences and personal abilities by enabling computer users to configure their computing experience by implicitly gathering information about the users' needs. The system can detect users' issues during the natural course of interaction with the system and offer to make adjustments to make their tasks simpler and more enjoyable. The system can allow for the configuration of settings that can impact users' abilities to receive important information from the system or provide input to the system.

Abstract: The present invention includes single electron structures and devices comprising a substrate having an upper surface, one or more dielectric layers formed on the upper surface of the substrate and having at least one exposed portion, at least one monolayer of self-assembling molecules attracted to and in contact with the at least one exposed portion of only one of the one or more dielectric layers, one or more nanoparticles attracted to and in contact with the at least one monolayer, and at least one tunneling barrier in contact with the one or more nanoparticles. Typically, the single electron structure or device formed therefrom further comprise a drain, a gate and a source to provide single electron behavior, wherein there is a defined gap between source and drain and the one or more nanoparticles is positioned between the source and drain.

Abstract: The present invention relates generally to photolithographic systems and methods, and more particularly to systems and methodologies that facilitate compensating for retrograde feature profiles on an imprint mask. An aspect of the invention generates feedback information that facilitates control of imprint mask feature profile via employing a scatterometry system to detect retrograde feature profiles, and mitigating the retrograde profiles via a spacer etchback procedure.

Abstract: The present invention relates generally to photolithographic systems and methods, and more particularly to systems and methodologies that facilitate compensating for imprint mask critical dimension error(s). An aspect of the invention generates feedback information that facilitates control of imprint mask critical dimension via employing a scatterometry system to detect imprint mask critical dimension error, and mitigating the error via a spacer etchback procedure.

Abstract: Disclosed are photolithographic systems and methods, and more particularly systems and methodologies that enhance imprint mask feature resolution. An aspect generates feedback information that facilitates control of imprint mask feature size and resolution via employing a scatterometry system to detect resolution enhancement need, and decreasing imprint mask feature size and increasing resolution of the imprint mask via a trim etch procedure.

Abstract: Disclosed are immersion lithography methods involving irradiating a first photoresist through a lens and an immersion liquid, the immersion liquid contacting the lens and the first photoresist in a first apparatus; contacting the lens with a supercritical fluid in a second apparatus; and irradiating a second photoresist through the lens and an immersion liquid, the immersion liquid contacting the lens and the second photoresist in the first apparatus.

Abstract: A method of making an organic memory cell which comprises two electrodes with a controllably conductive media between the two electrodes is disclosed. The present invention involves providing a dielectric layer having formed therein one or more first electrode pads; removing a portion of the first electrode pad to form a recessed area on top of the pads and in the dielectric layer using reverse electroplating; forming a controllably conductive media over the first electrode pad in the recessed area; and forming a second electrode over the conductive media. The controllably conductive media contains an organic semiconductor layer and a passive layer.

Abstract: The present invention relates generally to photolithographic systems and methods, and more particularly to systems and methodologies that modify an imprint mask. An aspect of the invention generates feedback information that facilitates control of imprint mask feature height via employing a scatterometry system to detect topography variation and, decreasing imprint mask feature height in order to compensate for topography variation.

Abstract: There is provided a method of making plurality of features in a first layer. A photoresist layer is formed over the first layer. Dense regions in the photoresist layer are exposed through a first mask under a first set of illumination conditions. Isolated regions in the photoresist layer are exposed through a second mask different from the first mask under a second set of illumination conditions different from the first set of illumination conditions. The exposed photoresist layer is patterned and then the first layer is patterned using the patterned photoresist layer as a mask.

Abstract: A system that facilitates extraction of line edge roughness measurements that are independent of proprietorship of a metrology device comprises a structure patterned onto silicon with known line edge roughness values associated therewith. A metrology device obtains line edge roughness measurements from the structure, and a correcting component generates an inverse function based upon a comparison between the known line edge roughness values and the measured line edge roughness values. The metrology device can thereafter measure line edge roughness upon a second structure patterned on the silicon, and the inverse function can be applied to such measured line edge roughness values to enable obtainment of line edge roughness measurements that are independent of proprietorship of the metrology device.

Abstract: The disclosure provides methods to mitigate and/or eliminate problems associated with removal of carbon-based resists from organic low k dielectrics. The methods include forming an organic low k dielectric layer over a semiconductor substrate, forming a capping layer over the organic low k dielectric layer, forming a silicon-containing resist over the capping layer, patterning the silicon-containing resist layer to expose portions of the capping layer and to form a patterned silicon oxide layer, removing the organic low k dielectric layer to form one or more openings, and removing the patterned silicon oxide layer. The silicon-containing resist facilitates efficient patterning of the organic low k-dielectric layers, and thereby increases the performance and cost-effectiveness of semiconductor devices fabricated using organic low k dielectrics.

Abstract: A system and method are provided to facilitate dual damascene interconnect integration with two imprint acts. The method provides for creation of a pair of translucent imprint molds containing the dual damascene pattern to be imprinted. The first imprint mold of the pair contains the via features of the dual damascene pattern and the second imprint mold of the pair contains the trench features. The via feature imprint mold is brought into contact with a first imaging layer deposited upon a first transfer layer which is deposited upon a dielectric layer of a substrate. The trench feature imprint mold is brought into contact with a second imaging layer deposited upon a second transfer layer which is deposited upon the first imaging layer of the substrate. When each imaging layer is exposed to a source of illumination, it cures with a structure matching the features of the corresponding imprint mold.

Abstract: The present invention is directed towards a system and/or methodology that facilitates controlling routing of blocks on a floor plan in an integrated circuit. A pattern collector receives a partially created routing pattern, and a comparing component makes a comparison between the at least partially created routing pattern with one or more patterns in a library of patterns. Routing is controlled based at least in part upon the comparison.

Abstract: The present invention provides a system and methodology for dummy-dispensing resist though a dispense head while mitigating waste associated with the dummy-dispense process. The dummy dispensed resist is returned to a reservoir from which it was taken. Between substrate applications, the dispense head can be positioned to dispense resist into a return line. The flow of resist from the dispense head keeps resist from drying at the dispense head. By funneling the dummy-dispensed resist into a return line with low volume, for example, waste from the dummy-dispensing process can be mitigated.

Abstract: Systems and methodologies are provided that account for surface variations of a wafer by adjusting grating features of an imprint lithography mask. Such adjustment employs piezoelectric elements as part of the mask, which can change dimensions (e.g., a height change) and/or move when subjected to an electric voltage. Accordingly, by regulating the amount of electric voltage applied to the piezoelectric elements a controlled expansion for such elements can be obtained, to accommodate for topography variations of the wafer surface.

Abstract: Disclosed are systems and methods that employ a structural framework of cell gratings placed on a wafer surface during an immersion lithography process to restrict motion of the immersion fluid. Thus, when the stepper lens comes in contact with the immersion fluid, a typically stable immersion fluid dynamics can be maintained with the cells during the immersion lithography process. In addition, various monitoring and control systems are employed to regulate stability of the immersion fluid.

Abstract: Systems and method for adjusting an etch rate of an organic bottom antireflective coating (BARC) layer on a wafer. The BARC layer can be exposed to an energy source at varied intensities to determine a relationship between bake temperature and solubility of the BARC after baking, which correlates to a rate at which the BARC can be etched. The BARC can be a cross-linking BARC, which becomes more cross-linked as bake temperature is increased, resulting in decreased etch rate, or can be a cleaving BARC, which is subject to removal of etch-resistant monomers as bake temperature is increased, resulting in increased etch rate. Thus, the invention provides for adjustable BARC etch rates that can be aligned to an etch rate of a photoresist deposited over the BARC to permit concurrent etching of both layers while mitigating structural defects that can occur if etch rates of the respective layers differ.