Abstract: An implantable electrode array assembly configured to apply electrical stimulation to the spinal cord. A substantially electrically nonconductive layer of the device has a first portion positionable alongside the spinal cord that includes a plurality of first openings. The layer has a second portion that includes a plurality of second openings. Electrodes and traces are positioned inside a peripheral portion of a body portion of the device and alongside the layer. At least one of the first openings is adjacent each of the electrodes to provide a pathway through which the electrode may provide electrical stimulation to the spinal cord. At least one of the second openings is adjacent each of the traces to provide a pathway through which the trace may receive electrical stimulation. At least one trace is connected to each electrode and configured to conduct electrical stimulation received by the trace(s) to the electrode.

Abstract: A method of removing portions of a conductive layer comprising a transparent conductive material and/or a metallic material disposed on a plastic substrate used for capacitive touchscreen devices includes providing a plastic substrate having a conductive layer disposed on a surface thereof and removing portions of the conductive layer at the surface of the plastic substrate to establish a pattern of electrically isolated conductive portions on the surface of the plastic substrate. The conductive portions or traces are electrically connected to a touchscreen controller, which is operable to determine a location of a touch or proximity of an object at or near the surface of the plastic substrate responsive to a detected change in capacitance. The removal process may comprise etching or laser ablating portions of the conductive layer at the surface of the plastic substrate.

Abstract: In a method of manufacturing a piezoelectric device, during an isolation formation step, a supporting substrate has a piezoelectric thin film formed on its front with a compressive stress film present on its back. The compressive stress film compresses the surface on a piezoelectric single crystal substrate side of the supporting substrate, and the piezoelectric thin film compresses the back of the supporting substrate, which is opposite to the surface on the piezoelectric single crystal substrate side. Thus, the compressive stress produced by the compressive stress film and that produced by the piezoelectric thin film are balanced in the supporting substrate, which causes the supporting substrate to be free of warpage and remain flat. A driving force that induces isolation in the isolation formation step is gasification of the implanted ionized element rather than the compressive stress to the isolation plane produced by the piezoelectric thin film.

Abstract: A suspension board with circuit includes a metal supporting board, an insulating layer formed on the metal supporting board, and a conductive pattern formed on the insulating layer and having a terminal portion connected to connecting terminals of a magnetic head mounted on a slider. A slider mounting region where the slider is disposed is defined, and a plurality of the terminal portions are spaced apart from each other in the slider mounting region, and in the metal supporting board, an opening which opens so as to expose the insulating layer where the terminal portions are disposed is formed at the slider mounting region.

Abstract: The present disclosure provides an article having (a) a substrate having a first nanostructured surface that is antireflective when exposed to air and an opposing second surface; and (b) a conductor micropattern disposed on the first surface of the substrate, the conductor micropattern formed by a plurality of traces defining a plurality of open area cells. The micropattern has an open area fraction greater than 80% and a uniform distribution of trace orientation. The traces of the conductor micropattern have a specular reflectance in a direction orthogonal to and toward the first surface of the substrate of less than 50%. Each of the traces has a width from 0.5 to 10 micrometer. The articles are useful in devices such as displays, in particular, touch screen displays useful for mobile hand held devices, tablets and computers.

Abstract: A wiring substrate includes: a wiring substrate body including a first surface and a second surface; a first electrode pad including a first recess therein and foamed on the first surface of the wiring substrate body; a second electrode pad including a second recess therein and formed on the first surface of the wiring substrate body; a first solder resist layer on the first surface of the wiring substrate body to cover the first and second electrode pads, the first solder resist layer including a first opening and a second opening whose opening area is larger than that of the first opening; and a first metal layer electrically connected to the first electrode pad and made of a material whose ionization tendency is smaller than that of a material of the first electrode pad. A depth of the first recess is larger than that of the second recess.

Abstract: An embedded electronic device and a method for manufacturing the same wherein the embedded electronic device is composed of a printed circuit board, having a top surface and a bottom surface, a plurality of circuit components attached to the top surface of the printed circuit board having a plurality of standoffs on the bottom surface of the printed circuit board, a bottom overlay attached to the bottom surface of the printed circuit board, a top overlay positioned above the top surface of the printed circuit board and a core layer positioned between the top surface of the printed circuit board and the top overlay.

Abstract: A method of manufacturing touch screen panels includes forming a photoresist film on a first surface of a substrate having high transmittance, removing the photoresist film in regions between unit cells by utilizing exposing and developing processes, etching the substrate in the regions where the photoresist film has been removed, removing the photoresist film from the substrate after the etching, performing a tempering process on the substrate including the etched regions, forming touch screen panels at the unit cells defined by the etched regions on the first surface of the substrate, and cutting the substrate at the etched regions to separate the touch screen panels.

Abstract: A method of patterning a conductor on a substrate includes providing an inked elastomeric stamp inked with self-assembled monolayer-forming molecules and having a relief pattern with raised features. Then the raised features of the inked stamp contact a metal-coated visible light transparent substrate. Then the metal is etched to form an electrically conductive micropattern corresponding to the raised features of the inked stamp on the visible light transparent substrate.

Abstract: This disclosure provides implementations of electromechanical systems (EMS) resonator structures, devices, apparatus, systems, and related processes. In one aspect, a device includes an evanescent-mode electromagnetic-wave cavity resonator. In some implementations, the resonator includes an isotropically-etched cavity operable to support one or more evanescent electromagnetic wave modes. In some implementations, the resonator also includes a cavity ceiling arranged to form a volume in conjunction with the isotropically-etched cavity. In some implementations, the resonator also includes a capacitive tuning structure having a portion that is located at least partially within the volume so as to support the evanescent electromagnetic wave modes. In some implementations, a distal surface of the tuning structure is separated from the closest surface to it by a gap distance, a resonant electromagnetic wave mode of the cavity resonator being dependent at least partially on the gap distance.

Abstract: Block copolymers can be self-assembled and used in methods as described herein for sub-lithographic patterning, for example. The block copolymers can be diblock copolymers, triblock copolymers, multiblock copolymers, or combinations thereof. Such methods can be useful for making devices that include, for example, sub-lithographic conductive lines.

Abstract: In a through hole closing process, a metal plate is attached to one surface of a conductive base member having a plurality of through holes by the use of a magnet, in a copper plating process, a copper plating layer is formed on the conductive base member and the metal plate exposed within the through holes, from the side of the conductive base member where the metal plate is not attached, thereby to fill up the through holes, in a film forming process, a Pd alloy film is formed by plating on the surface of the conductive base member after removal of the metal plate, and in a removal process, the copper plating layer is removed by selective etching, thereby to produce a hydrogen production filter that is used in a reformer a fuel cell so as to be capable of stably producing high purity hydrogen gas.

Abstract: The present disclosure relates to a method of fabricating a capacitive touch pane where a plurality of groups of first conductive patterns are formed along a first direction, a plurality of groups of second conductive patterns are formed along a second direction, and a plurality of connection components are formed on a substrate. Each first conductive pattern is electrically connected to another adjacent first conductive pattern in the same group by each connection component and each group of the second conductive patterns is interlaced with and insulated from each group of the first conductive patterns. Next, a plurality of curved insulation mounds are formed to cover the first connection components. Then, a plurality of bridge components are formed to electrically connect each second conductive pattern with another adjacent second conductive pattern in the same group.

Abstract: Methods for fabricating sub-lithographic, nanoscale microchannels utilizing an aqueous emulsion of an amphiphilic agent and a water-soluble, hydrogel-forming polymer, and films and devices formed from these methods are provided.

Abstract: A connecting system having a female element including a hollow flared part for receiving and guiding a male element and a hollow mating part for mating with the male element. A part to be mated of the male element has an outside diameter that before the mating is larger than an inside diameter of the mating part of the female element, and the part to be mated of the male element is made of a material that can be strained and has a corrugated transverse cross section, so as to contract when it is plugged into the mating part of the female element, and/or the mating part of the female connection element is made of a material that can be strained and has a corrugated transverse cross section, so as to dilate when the part to be mated of the male element is plugged into it.

Abstract: A method for fabricating a hermetically sealed electrical feedthrough. The method provides a ceramic sheet and forming at least one via hole in the ceramic sheet, inserting a conductive thickfilm paste into the via hole, laminating the ceramic sheet that has a paste filled via hole between an upper ceramic sheet and a lower ceramic sheet to form an integral ceramic substrate, firing the laminated ceramic substrate to sinter the ceramic substrate and cause the paste filled via hole to form a metalized via while the laminated ceramic substrate form a hermetic seal around the metalized via. The upper ceramic sheet and the lower ceramic sheet are removed from the fired ceramic substrate to expose the upper and lower surface of the metalized via.

Abstract: A system includes an electrochemically functional membrane, and a support structure constructed and arranged so as to support the membrane while leaving within the membrane a chemically active area having an area utilization of at least about 50%. In some embodiments, the support structure may include a plurality of grids that are sized and shaped so that the contact area between the grids and the membrane is reduced to less than about 40%. In some embodiments, the support structure may include aerogels, for example PVA-reinforced CNT aerogels having a conductivity that is increased by pyrolysis. The system may be a gas separation system; a gas production system; a gas purification system; or an energy generation system such as an SOFC.

Abstract: A conductive pattern film substrate and manufacturing method for combining two anisotropic materials, namely a patterned body and a film layer, without assistance from an intermediate layer. The method includes producing a thermal spraying source for performing a heating operation on a film material to prepare the film material for thermal spraying or semi-thermal spraying and thereby decompose the film material into film particles; and spraying the film particles to a pattern layer disposed on the body and having the pattern by the thermal spraying source to form the film layer having the film particle on the pattern layer, thereby enabling the body to embody electrical characteristics of the pattern.

Abstract: An opto-electric hybrid board which is capable of suppressing the increase in light propagation losses and which is excellent in flexibility, and a method of manufacturing the same are provided. The opto-electric hybrid board includes an electric circuit board, an optical waveguide, and a metal layer. The electric circuit board includes an insulative layer having front and back surfaces, and electrical interconnect lines formed on the front surface of the insulative layer. The optical waveguide is formed on the back surface of the insulative layer of the electric circuit board. The metal layer is formed between the optical waveguide and the back surface of the insulative layer of the electric circuit board. The metal layer is patterned to have a plurality of strips. Cores of the optical waveguide are disposed in a position corresponding to a site where the metal layer is removed by the patterning.

Abstract: An opto-electric hybrid board includes an electric circuit board, an optical waveguide, and a metal layer. The electric circuit board includes an insulative layer having front and back surfaces, and electrical interconnect lines formed on the front surface of the insulative layer. The optical waveguide includes a first cladding layer and cores, and the optical waveguide is formed on the back surface of the insulative layer of the electric circuit board. The metal layer is formed between the first cladding layer of the optical waveguide and the back surface of the insulative layer of the electric circuit board. Part of the opto-electric hybrid board is formed as a to-be-bent portion. The metal layer is partially removed in a portion corresponding to the to-be-bent portion. A first cladding layer of the optical waveguide fills a site where the metal layer is removed.

Abstract: Disclosed are a test piece and the manufacturing method thereof The test piece includes an insulating substrate and a circuit pattern structure formed on the insulating substrate, wherein circuit pattern structure includes a first metal pattern layer, a second metal pattern layer, a third metal pattern layer, a fourth metal pattern layer, and a fifth metal pattern layer. The first metal pattern layer, the second metal pattern layer, the third metal pattern layer, the fourth metal pattern layer, and the fifth metal pattern layer have same pattern shapes and positions thereof are overlapping in a plane. The first metal pattern layer and the second metal pattern layer are nano-metal films formed by vacuum coating, therefore, the test piece has excellent uniformity of film and low resistance to provide a stable test current to prevent the judging mistakes and to improve the test efficiency.

Abstract: A magnetic resonance coil for transmitting and/or receiving magnetic resonance signals is provided. The magnetic resonance coil includes at least two overlapping coil elements. Coil conductors of the at least two overlapping coil elements intersect in intersection regions and are arranged on a support. Mutually overlapping coil elements of the at least two overlapping coil elements are arranged on different sides of the support. The support is formed from at least three layers of a support material. A cavity that is filled with air or a filler material, the dielectric constant of the filler material being lower than the dielectric constant of the support material, is provided in the intersection regions in a middle layer of the at least three layers.

Abstract: A printed circuit board manufacturing system and a manufacturing method thereof are disclosed. A method of manufacturing printed circuit board, comprising: providing a substrate that comprises a pad and an insulation layer covering the pad; acquiring an image of the substrate; acquiring location information of the pad by analyzing the image of the substrate; forming a via hole by removing a part of the insulation layer that corresponds the location information of the pad; and forming a via by filling the via hole with a conductive material, provides improved process conformity, even if the substrate has partial or nonlinear deformation, by considering the location information of the pad in the via hole forming. The improved conformity may allow more flexibility to substrate design and more integrity for circuitries on printed circuit board.

Abstract: In order to provide a method of manufacturing a multilayer wiring substrate, a base member having a copper foil separably laminated thereon is prepared, and a solder resist layer is formed on the copper foil. Openings are formed in the solder resist layer, and a metal conductor portion is formed in each of the openings. By means of sputtering, a dissimilar metal layer is formed over the surface of the metal conductor portion and the entire surface of the solder resist layer. Copper electroplating is performed so as to form connection terminals and a conductor layer on the dissimilar metal layer. After a build-up step, the base material is removed, whereby the copper foil is exposed, and the exposed copper foil and the metal conductor portion are removed through etching, whereby the surfaces of the external connection terminals are exposed from the openings.

Abstract: Gradation exposure is performed on an insulating layer by irradiating the insulating layer with exposure light using a photomask having a partial light-transmitting region that is configured to be partially transmittable of the exposure light. After the gradation exposure, development processing is performed on the insulating layer such that a recess is formed in a portion of the insulating layer that has been irradiated with the exposure light through the partial light-transmitting region. The partial light-transmitting region of the photomask has a plurality of first holes that are transmittable of the exposure light and a plurality of second holes that are arranged to surround the plurality of first holes and transmittable of the exposure light, and the area of each second hole is larger than the area of each first hole.

Abstract: A method for aligning an opto-electronic component in an IC die with an optical port is disclosed. This is achieved, in various embodiments, by forming alignment features in the IC die that can mate with complementary alignment features of the optical port. The formation of alignment features can be performed at the wafer level during fabrication of the IC die. An optical signal carrier may be optically coupled to the optical port such that the signal carrier may communicate optically with the opto-electronic component.

Abstract: A method for forming a deep trench includes providing a substrate with a bottom layer and a top layer; performing a first etching process to etch the top layer, the bottom layer and the substrate so as to form a recess; selectively depositing a liner covering the top layer, the bottom layer and part of the substrate in the recess; using the liner as an etching mask to perform a second dry etching to etch the recess unmasked by the liner so as to form a deep trench; performing a selective wet etching to remove the top layer; and performing a post wet etching to enlarge the deep trench.

Abstract: A multi-layer structure including a base insulating layer and a thin metal film layer (seed layer) is prepared. A plating resist layer is formed to have a prescribed pattern on the upper surface of the thin metal film layer. A metal plating layer is formed on the thin metal film layer exposed by electroplating. Then, the plating resist layer is removed, and the thin metal film layer in the region having the plating resist layer is removed. In this way, a conductive pattern including the thin metal film layer and the metal plating layer is formed. The upper surface of the base insulating layer in the region without the conductive pattern is subjected to roughening treatment. A cover insulating layer is formed on the upper surfaces of the base insulating layer and the conductive pattern. In this way, a printed circuit board is completed.

Abstract: The present invention generally relates to high frequency piezoelectric crystal composites, devices, and method for manufacturing the same. In adaptive embodiments an improved imaging device, particularly a medical imaging device or a distance imaging device, for high frequency (>20 MHz) applications involving an imaging transducer assembly is coupled to a signal imagery processor. Additionally, the proposed invention presents a system for photolithography based micro-machined piezoelectric crystal composites and their uses resulting in improved performance parameters.

Abstract: Methods for fabricating sub-lithographic, nanoscale microstructures in line arrays utilizing self-assembling block copolymers, and films and devices formed from these methods are provided.

Abstract: A composition including a plurality of electroactive porous particle fragments including silicon as an electroactive material is characterised in that each porous particle fragment includes a network of pores defined and separated by silicon containing walls. The network of pores suitably has a three dimensional arrangement of pores extending through the volume of the particle in which the pore openings are provided on two or more planes over the surface of the particle. The composition is useful as an electroactive material that is able to form an alloy with lithium and can be used in the fabrication of anodes for use in lithium ion secondary batteries. A method of fabricating the silicon containing porous particle fragments is also disclosed.

Abstract: According to the present disclosure, a manufacturing method of a fine wiring pattern is disclosed. The manufacturing method includes preparing a support member, forming a first layer on the support member by thick-film printing, and forming a second layer including Ag on the first layer by the thick-film printing. The method also includes forming a predetermined fine wiring pattern by performing an etching process upon the first layer and the second layer.

Abstract: An electrode active material layer for a lithium-ion secondary battery is formed from an electrode active material of layered crystal. The electrode active material having layered crystal is oriented in a layer direction of the electrode active material layer, and a plurality of through holes are formed from the surface of the electrode active material layer. The diameter of the through holes is preferably 10 ?m to 5000 ?m inclusive.

Abstract: A method of fabricating a nanoporous membrane filter having a uniform array of nanopores etch-formed in a thin film structure (e.g. (100)-oriented single crystal silicon) having a predetermined thickness, by (a) using interferometric lithography to create an etch pattern comprising a plurality array of unit patterns having a predetermined width/diameter, (b) using the etch pattern to etch frustum-shaped cavities or pits in the thin film structure such that the dimension of the frustum floors of the cavities are substantially equal to a desired pore size based on the predetermined thickness of the thin film structure and the predetermined width/diameter of the unit patterns, and (c) removing the frustum floors at a boundary plane of the thin film structure to expose, open, and thereby create the nanopores substantially having the desired pore size.

Abstract: A chemical solution that removes undesired metal hard mask yet remains selective to the device wiring metallurgy and dielectric materials. The present disclosure decreases aspect ratio by selective removal of the metal hard mask before the metallization of the receiving structures without adverse damage to any existing metal or dielectric materials required to define the semiconductor device, e.g. copper metallurgy or device dielectric. Thus, an improved aspect ratio for metal fill without introducing any excessive trapezoidal cross-sectional character to the defined metal receiving structures of the device will result.

Abstract: A method for determining a minimum tension compensation stress which will have a membrane of a thickness of less than or equal to one micrometer, secured to a frame, having, in the absence of any external stress, a desired deflection. The membrane can be made as planar as possible in absence of any external stress, and its thickness can be less than or equal to one micrometer.

Abstract: A micromechanical solid-electrolyte sensor device includes a micromechanical carrier substrate having a front side and a back side. The micromechanical solid-electrolyte sensor device also includes a first porous electrode and a second porous electrode. The micromechanical solid-electrolyte sensor device also includes a solid-electrolyte embedded between the first porous electrode and the second porous electrode.

Abstract: Methods of forming at least one nanochannel include: (a) providing a substrate having a thick single or a thick multi-layer overlayer; (b) milling at least one channel through the overlayer into the substrate; then (c) removing the overlayer; and (d) forming at least one nanochannel in the substrate having an average width and depth dimension that is less than about 10 nm in response to the milling and removing steps.

Abstract: A piezoelectric device prevents damage to a piezoelectric thin film caused by etching and the manufacturing cost of the piezoelectric device is reduced. On a surface of a support layer formed on a support substrate, an etching adjustment layer is formed. An etchant flows through etching windows to simultaneously form a through hole through which a portion of a sacrificial layer is exposed to a side of a piezoelectric thin film and an opening through which the etching adjustment layer, which is conductive with a lower electrode, is exposed to the side of the piezoelectric thin film. By making an etchant flow through the through hole, the sacrificial layer is removed. A lead-out wiring is formed between an upper electrode and a bump pad and a lead-out wiring is formed between the conductive etching adjustment layer, which is conductive with the lower electrode, and a bump pad.

Abstract: The present invention provides a metallized via-holed ceramic substrate having (1) a sintered ceramic substrate, (2) an electroconductive via formed in the sintered ceramic substrate, having an electroconductive metal closely filled in a through-hole of the sintered ceramic substrate, wherein the electroconductive metal contains a metal (A) with melting point of 600° C. to 1100° C., a metal (B) with higher melting point than the metal (A), and an active metal, (3) a wiring pattern on at least one face of the sintered ceramics substrate, having an electroconductive surface layer and a plating layer thereon, wherein the electroconductive surface layer consists of an electroconductive metal containing the metal (A), the metal (B), and an active metal, (4) an active layer formed in the interface between the electroconductive via and the sintered ceramic substrate, and (5) an active layer formed in the interface between the electroconductive surface layer and the sintered ceramic substrate.

Abstract: Embodiments of the present disclosure relate to the field of printed circuit boards and particularly to a multi-layer printed circuit board. The multi-layer printed circuit board includes at least two inner-layer circuit boards, each of which has a non-circuit pattern area including a welding area. Each welding area has at least one welding hole. Further, at least one prepreg is used to fill between two adjacent inner-layer circuit boards and is melted to fill into the welding hole in a welding process. In the multi-layer printed circuit board according to the embodiments of the disclosure, a welding area is arranged in a non-circuit pattern area, and one or more welding holes are arranged in the welding area so that a prepreg between two inner-layer circuit boards can be melted filling into the welding hole(s) in a welding process, thus enhancing effectively an adhesive force binding the inner-layer circuit boards.

Abstract: An electrical interconnect has a circuit substrate and an electrical connection point on the circuit substrate. The electrical connection point includes a lattice of conductive material that is adjacent a gap in the circuit substrate and has anchor points that are attached to the circuit substrate. In some configurations, a conductive epoxy encapsulates at least a portion of the lattice of conductive material and may include a second electrical connection point that is bonded to the other electrical connection point through the conductive epoxy.

Abstract: A method of forming a via hole in a circuit board including an insulating layer and a metal layer disposed on each of top and bottom surfaces of the insulating layer, the method including: selectively removing a portion of each of the metal layers where the via hole is to be formed thereby exposing the insulating layer; and removing the exposed insulating layer, wherein the removing of the exposed insulating layer includes chemically swelling the exposed insulating layer and removing the swollen insulating layer.

Abstract: The invention relates to a method of manufacturing an electrostatic clamp configured to electrostatically clamp an article to an article support in a lithographic apparatus. The method includes providing a first layer of material, etching a recess in the first layer of material, and disposing an electrode in the recess of the first layer of material.

Abstract: An exemplary method for manufacturing a circuit board includes, firstly, providing a substrate made of heat conductive, electrically insulative material. Then a copper layer is formed on the substrate. After that, nickel is plated on the copper layer to form a nickel layer. Finally, gold is and plated on the nickel layer to form a gold layer.

Abstract: A light emitting device includes a substantially cuboid package made up of a molded article and a lead that is embedded in the molded article, and a light emitting element that is installed in the package. The lead has a connector where the light emitting element is installed, and a terminal part and an exposed part that are linked to the connector. The package has a bottom face, a front face that is a light emission face contiguous with the bottom face, and a rear face that is contiguous with the bottom face and is opposite the front face. The first terminal part and the exposed part are linked to the rear face side of the connector are exposed from the molded article and contiguous with the bottom face and the rear face, and are isolated at the bottom face.

Abstract: A drug-delivery chip and a method of fabricating the same are provided. The drug-delivery chip has a main body having at least one drug receiving space individually formed with an opening for storing drugs therein; a thin film for sealing up the at least one drug receiving space; a first conductive wire connecting to one end of the thin film; a second conductive wire connecting to another end of the thin film; a signal-receiving module for receiving actuated signals; and a control module for applying voltages to first and second wire conductive s according to the actuated signal, thereby generating heat to break off the thin film for the release of a drug or drugs received in the at least one drug receiving space.

Abstract: Fundamental interconnect systems for connecting high-speed electronics elements are provided. The interconnect systems consists of signal line, dielectric system with open trench or slot filled up with air or lower dielectric loss material, and the ground plane. The signal line could be for example, microstripline, strip line, coplanar line, single line or differential pairs. The interconnect system can be used for on-chip interconnects or can also be used for off-chip interconnects. The fundamental techniques provided in this invention can also be used for high-speed connectors and high-speed cables.

Abstract: A method for manufacturing a flexible display device in which a flexible substrate is acquired by forming display devices on one side of the substrate and thinning the substrate by removing surface portions on an opposite side of the substrate. The thickness of the substrate is changed from a first thickness, which gives rigidity to the substrate to the second thickness, which gives flexibility to the substrate.

Abstract: Systems, methods and apparatus are provided through which in some embodiments a mass spectrometer micro-leak includes a number of channels fabricated by semiconductor processing tools and that includes a number of inlet holes that provide access to the channels.