Abstract: The photo detector array is configured to generate pulses with short rise and fall times because each Geiger mode avalanche photodiode includes an anode contact, a cathode contact, an output contact electrically insulated from the anode and cathode contacts, a semiconductor layer, and at least one shield or metal structure in the semiconductor layer capacitively coupled to the semiconductor layer and coupled to the output contact. The output contacts of all Geiger mode avalanche photodiodes are connected in common and are configured to provide for detection of spikes correlated to avalanche events on any avalanche photodiode of the array.

Abstract: An optical detector includes a detector surface operable to receive light, a depleted field region coupled to the underside of the detector surface, a charge collection node underlying the depleted field region, an active pixel area that includes the portion of the depleted field region above the charge collection node and below the detector surface, and two or more guard regions coupled to the underside of the detector surface and outside of the active pixel area. The depleted field region includes an intrinsic or a near-intrinsic material. The charge collection node has a first width, and the guard regions are separated by a second width that is greater than the first width of the charge collection node. The guard regions are operable to prevent crosstalk to an adjacent optical detector.

Abstract: An image sensor including a pixel array having a floating diffusion region of a pixel which is disposed in a substrate, the floating diffusion region to receive a charge from a photosensitive region. In an embodiment, a transfer gate disposed on the substrate, wherein a portion of the transfer gate forms a cavity extending through the transfer gate. In another embodiment, a cavity extending through a transfer gate exposes a floating diffusion region.

Abstract: A method for forming a back-side illuminated image sensor from a semiconductor substrate, including the steps of: a) forming, from the front surface of the substrate, areas of same conductivity type as the substrate but of higher doping level, extending deep under the front surface, these areas being bordered with insulating regions orthogonal to the front surface; b) thinning the substrate from the rear surface to the vicinity of these areas and all the way to the insulating regions; c) partially hollowing out the insulating regions on the rear to surface side; and d) performing a laser surface anneal of the rear surface of the substrate.

Abstract: A solid state imaging device having a light sensing section that performs photoelectric conversion of incident light includes: an insulating layer formed on a light receiving surface of the light sensing section; a layer having negative electric charges formed on the insulating layer; and a hole accumulation layer formed on the light receiving surface of the light sensing section.

Abstract: Provided is a method of fabricating a backside illuminated image sensor that includes providing a device substrate having a frontside and a backside, where pixels are formed at the frontside and an interconnect structure is formed over pixels, forming a re-distribution layer (RDL) over the interconnect structure, bonding a first glass substrate to the RDL, thinning and processing the device substrate from the backside, bonding a second glass substrate to the backside, removing the first glass substrate, and reusing the first glass substrate for fabricating another backside-illuminated image sensor.

Abstract: This disclosure relates to an active pixel cell including a shallow trench isolation (STI) structure. The active pixel cell further includes a photodiode neighboring the STI structure, where a first stress resulted from substrate processing prior to deposition of a pre-metal dielectric layer increases dark current and white cell counts of a photodiode of the active pixel cell. The active pixel cell further includes a transistor, where the transistor controls the operation of the active pixel cell. The active pixel cell further includes a stress layer over the photodiode, the STI structure, and the transistor, and the stress layer has a second stress that counters the first stress exerted on the substrate, and the second stress reduces the dark current and the white cell counts caused by the first stress.

Abstract: According to the present disclosure, it is possible to further miniaturize the gate electrode of the field-effect transistor. The field-effect transistor includes a substrate; a semiconductor layer configured to be formed on the substrate and have a fin region formed thereon with a source region and a drain region formed at both ends of the fin region; and a gate electrode configured to have a convex portion partially in contact with at least two faces of the fin region.

Abstract: Disclosed are a 4T-4S step & repeat unit pixel used in an image sensor and an image sensor having the same. The 4T-4S step & repeat unit pixel has four diffusion area patterns for photodiodes and three diffusion area patterns for an image signal conversion circuit. An aperture ratio of the image sensor increases in maximum by using four photodiodes arranged in a diagonal direction from each other and three diffusion area patterns arranged between the photodiodes near their edges.

Abstract: Provided are image sensors and methods of manufacturing the same. An image sensor includes a metal line and an interlayer insulation layer on a semiconductor substrate including a readout circuit; an image detection unit on the interlayer insulation layer and including stacked first and second doping layers; a pixel separation unit penetrating the image detection unit, separating the image detection unit by pixel; a first metal contact penetrating the image detection unit and the interlayer insulation layer to contact the metal line; a first barrier pattern protecting the first metal contact from contacting the second doping layer, while exposing the first metal contact to the first doping layer; and a second metal contact in a trench above the first metal contact, wherein the second metal contact is electrically connected to the second doping layer while being isolated from the first metal contact by a second barrier pattern.

Abstract: An example complementary metal oxide semiconductor (CMOS) image sensor includes an epitaxial layer, an array of pixels, and a trench capacitor. The array of pixels are formed on a front side of the epitaxial layer in an pixel array area of the image sensor. The array of pixels includes one or more shallow trench isolation structures disposed between adjacent pixels for isolating the pixels in the pixel array area. The trench capacitor is formed on the front side of the epitaxial layer in a peripheral circuitry area of the image sensor.

Abstract: A thin film transistor (TFT) structure is implemented. This embodiment is much less sensitive than conventional TFTs to alignment errors and substrate distortion. In such a configuration, there is no need to define gate features, so the layout is simplified. Moreover, the gate layer may be patterned by several inexpensive printing or non-printing methods.

Abstract: An imaging element includes a plurality of pixels that are two-dimensionally arranged and each have a light receiving part including a photoelectric conversion element and a light collecting part that collects incident light toward the light receiving part. Each of the light collecting parts in the plurality of pixels includes an optical functional layer having, in a surface, a specific projection and depression structure depending on the pixel position.

Abstract: An image sensor including a pixel array is provided. The pixel array includes R×S sub-pixel arrays. The sub-pixel array includes P×Q pixels. Each pixel includes a photodiode, a first transistor, a second transistor, a third transistor, a fourth transistor, and a fifth transistor. The gate of the second transistor is coupled to a row control signal. The second source/drain electrode of the second transistor is coupled to a column control signal. The gate electrode of the third transistor is coupled to a reset signal. The second source/drain electrode of the third transistor is coupled to a column voltage reset signal. The gate electrode of the fifth transistor is coupled to a row select signal. The sub-pixel array uses the row control signal, the column control signal, the column voltage reset signal, and the row select signal to select an output the sensing signal of one of the pixels.

Abstract: An organic light emitting device is disclosed. In one embodiment, the device includes a plurality of pixels formed on a substrate, wherein each of the pixels includes: a first electrode layer formed on the substrate; an organic emission layer formed on the first electrode layer and a second electrode layer formed on the organic emission layer. Further, at least one of the first electrode layers of the pixels is externally patterned.

Abstract: A first photoelectric conversion element, which detects light and converts the light into photoelectrons has: one MOS diode having an electrode formed on a semiconductor base body with an insulator therebetween; and a plurality of embedded photodiodes formed in the semiconductor base body. The electrode of the MOS diode has, when viewed from the upper surface, a comb-like shape wherein a plurality of branch portions are branched from one electrode portion. Each of the embedded photodiodes is disposed to nest between the branch portions of the electrode when viewed from the upper surface.

Abstract: A first photoelectric conversion element, which detects light and converts the light into photoelectrons has: one first MOS diode having a first electrode formed on a semiconductor base body with an insulator therebetween; and a plurality of second MOS diodes, each of which has a second electrode formed on the semiconductor base body with the insulator therebetween. The first electrode of the first MOS diode has, when viewed from the upper surface, a comb-like shape wherein a plurality of branch portions are branched from one electrode portion. Each second electrode of each of the second MOS diodes is, when viewed from the upper surface, separated from the first electrode, and is disposed to nest between the branch portions of the first electrode.

Abstract: A CMOS image sensor, in which an implantation process is performed on substrate under isolation structures each disposed between two adjacent photosensor cell structures. The implantation process is a destructive implantation to form lattice effects/trap centers. No defect repair process is carried out after the implantation process is performed. The implants can reside at the isolation structures or in the substrate under the isolation structures. Dark leakage and crosstalk are thus suppressed.

Abstract: A back side illumination (BSI) image sensor includes at least one pixel. The pixel area includes a photo diode and a transfer transistor. The transfer transistor has a control electrode made of a gate poly and a gate oxide for receiving a control instruction, a first electrode coupled to the photo diode, and a second electrode, wherein an induced conduction channel of the transfer transistor partially surrounds a recessed space which is filled with the gate poly and the gate oxide of the first transistor.

Abstract: The present invention is to provide an electromagnetic wave detecting element that can prevent a decrease in light utilization efficiency at sensor portions. The sensor portions are provided so as to correspond to respective intersection portions of scan lines and signal lines, and have semiconductor layer that generate charges due to electromagnetic waves being irradiated, and at whose electromagnetic wave irradiation surface sides upper electrodes are formed, and at whose electromagnetic wave non-irradiation surface sides lower electrodes are formed. Bias voltage is supplied to the respective upper electrodes via respective contact holes by a common electrode line that is formed further toward an electromagnetic wave downstream side than the semiconductor layer.

Abstract: An image sensor having a backside illumination structure can include a photo diode unit in a first wafer, where the photo diode unit includes photo diodes and transfer gate transistors coupled to respective ones of the photo diodes. A wiring line unit can be included on a second wafer that is bonded to the photo diode unit, where the wiring line unit includes wiring lines and transistors configured to process signals provided by the photo diode unit and configured to control the photo diode unit. A supporting substrate is bonded to the wiring line unit and a filter unit is located under the first wafer.

Abstract: An image sensor and a method for manufacturing an image sensor. An image sensor may include a readout circuitry which may be formed on and/or over a first substrate. An image sensor may include an interlayer dielectric layer formed on and/or over a first substrate. An image sensor may include a metal line formed on and/or over an interlayer dielectric layer, and may include a top plug. An image sensor may include an image sensing device formed on and/or over a top plug. An image sensor may include a first conductive type ion implantation area formed on and/or over an area of an image sensing device corresponding to a top plug. Methods of manufacturing an image sensor are disclosed.

Abstract: Photodetector arrays, image sensors, and other apparatus are disclosed. In one aspect, an apparatus may include a surface to receive light, a plurality of photosensitive regions disposed within a substrate, and a material coupled between the surface and the plurality of photosensitive regions. The material may receive the light. At least some of the light may free electrons in the material. The apparatus may also include a plurality of discrete electron repulsive elements. The discrete electron repulsive elements may be coupled between the surface and the material. Each of the discrete electron repulsive elements may correspond to a different photosensitive region. Each of the discrete electron repulsive elements may repel electrons in the material toward a corresponding photosensitive region. Other apparatus are also disclosed, as are methods of use, methods of fabrication, and systems incorporating such apparatus.

Abstract: A complementary metal oxide semiconductor (CMOS) image sensor device includes a capacitive coupled photodiode that is formed within a region of a semiconductor substrate. The photodiode receives an incident light and generates a corresponding electric charge. The CMOS image sensor device includes a reset transistor coupled to the photodiode for reverse biasing the photodiode with a predetermined voltage. The CMOS image sensor device further includes a buffer circuit and a capacitor, which is interposed between the photodiode and the buffer circuit. The capacitor is configured to transfer the electric charge to the buffer circuit. The buffer circuit may include an emitter follower or a source follower transistor.

Abstract: Photodetector arrays, image sensors, and other apparatus are disclosed. In one aspect, an apparatus may include a surface to receive light, a plurality of photosensitive regions disposed within a substrate, and a material coupled between the surface and the plurality of photosensitive regions. The material may receive the light. At least some of the light may free electrons in the material. The apparatus may also include a plurality of discrete electron repulsive elements. The discrete electron repulsive elements may be coupled between the surface and the material. Each of the discrete electron repulsive elements may correspond to a different photosensitive region. Each of the discrete electron repulsive elements may repel electrons in the material toward a corresponding photosensitive region. Other apparatus are also disclosed, as are methods of use, methods of fabrication, and systems incorporating such apparatus.

Abstract: An apparatus includes a pixel region having disposed therein in a matrix form a plurality of conversion components, an amplifier transistor which amplifies a signal from the plurality of conversion components, a reset transistor which sets the potential of an input portion of the amplifier transistor to a reset potential, and a select transistor which is connected in series to the amplifier transistor and selects and reads the amplified signal, and well contact regions which are provided within the pixel region. Each of the well contact regions is neighboring to a drain region of the reset transistor, and the drain region of the reset transistor has a lower impurity concentration than the impurity concentration in the source and drain regions of the select transistor.

Abstract: The active pixel cell structures and methods of preparing such structures described above enable reduction of dark current and white cell counts for active pixel cells. The process of preparing active pixel cell structures introduces stress on the substrate, which could lead to increased dark current and white cell counts of active pixel cells. By depositing a stress layer as part of a pre-metal dielectric layer with a stress that counters the stress induced, both the dark current and the white cell counts can be reduced. If the transistors of the active pixel cells are NMOS, the carrier mobility can also be increased by a tensile stress layer. Raman Spectroscopy can be used to measure the stress exerted on the substrate prior to the deposition of the stress layer.

Abstract: A photovoltaic device operable to convert light to electricity, comprising a substrate, a plurality of structures essentially perpendicular to the substrate, one or more recesses between the structures, each recess having a planar mirror on a bottom wall thereof and each recess filled with a transparent material. The structures have p-n or p-i-n junctions for converting light into electricity. The planar mirrors function as an electrode and can reflect light incident thereon back to the structures to be converted into electricity.

Abstract: A solid-state imaging device including an imaging region having a plurality of pixels arranged in a two-dimensional matrix and a peripheral circuit detecting output signals from the pixels. An impurity concentration in a transistor of each pixel is lower than an impurity concentration in a transistor of the peripheral circuit. Further, the impurity concentration of a semiconductor well region under a floating diffusion portion in the pixel is set to be lower than the impurity concentration of a semiconductor well region under a transistor portion at the subsequent stage of the floating diffusion portion.

Abstract: High optical efficiency CMOS image sensors capable of sustaining pixel sizes less than 1.2 microns are provided. Due to high photodiode fill factors and efficient optical isolation, microlenses are unnecessary. Each sensor includes plural imaging pixels having a photodiode structure on a semiconductor substrate adjacent a light-incident upper surface of the image sensor. An optical isolation grid surrounds each photodiode structure and defines the pixel boundary. The optical isolation grid extends to a depth of at least the thickness of the photodiode structure and prevents incident light from penetrating through the incident pixel to an adjacent pixel. A positive diffusion plug vertically extends through a portion of the photodiode structure. A negative diffusion plug vertically extends into the semiconductor substrate for transferring charge generated in the photodiode to a charge collecting region within the semiconductor substrate.

Abstract: The semiconductor light receiving element 1 includes a semiconductor substrate 101, and a semiconductor layer having a photo-absorption layer 105 disposed on the top of the semiconductor substrate 101. The semiconductor layer of the semiconductor light receiving element 1 containing at least the photo-absorption layer 105 has a mesa structure, and a side wall of the mesa is provided with a protective film 113 covering the side wall. The protective film 113 is a silicon nitride film containing hydrogen, and a hydrogen concentration in one surface of the protective film 113 located at the side of the mesa side wall is lower than a hydrogen concentration in the other surface of the protective film 113 located at the side that is opposite to the side of the mesa side wall.

Abstract: Disclosed herein is a semiconductor device having a vertical MOS transistor having a channel of a first conductivity type and formed by burying a gate electrode in a semiconductor substrate, a planar MOS transistor having a channel of the first conductivity and having a gate electrode formed on the semiconductor substrate, and a planar MOS transistor having a channel of a second conductivity and having a gate electrode formed on the semiconductor substrate, the semiconductor device, including other circuit element(s), other than a transistor, formed either below or above the vertical MOS transistor having the channel of the first conductivity type.

Abstract: A CMOS image sensor has a pixel array provided with a plurality of unit pixels arranged in a matrix shape of rows and columns. Each of the unit pixel includes a photocharge generation means for generating photocharges by absorbing an external light; and a sensing node for receiving the photocharges transferred from the photocharge generation means, wherein the sensing node of the unit pixel in a previous scan line is shared with a sensing node of a unit pixel in a current scan line in response to a line select signal of the current line.

Abstract: In a manufacturing method for an image sensor integrated circuit, a plurality of pixel regions each having a photodiode are arranged on a silicon substrate. A light-transmissive conductive film is formed over the silicon substrate. A protective film is formed on the light-transmissive conductive film while holding a potential of the light-transmissive conductive film at the same potential as that of the silicon substrate.

Abstract: An image sensor can include a gate insulation layer, a gate electrode, a photodiode, and a floating diffusion region. The gate insulation layer can be formed on and/or over a semiconductor substrate for a transfer transistor. The gate insulation layer includes a first gate insulation layer having a central opening and a second gate insulation layer formed on and/or over an uppermost surface of the first gate insulation layer including the opening. The gate electrode can be formed on and/or over the gate insulation layer. The photodiode can be formed in the semiconductor substrate at one side of the gate electrode so as to generate an optical charge. The floating diffusion region can be formed in the semiconductor at the other side of the gate electrode opposite to the photodiode. The floating diffusion region can be electrically connected to the photodiode through a channel so as to store the optical charge generated from the photodiode.

Abstract: A photoelectric conversion device includes a first electrode; and, over the first electrode, photoelectric conversion layer that includes a first semiconductor layer having one conductivity, a second semiconductor layer over the first semiconductor layer, and a third semiconductor layer having a conductivity opposite to the one conductivity of the second semiconductor layer. An insulating layer is over the third semiconductor layer, and a second electrode is over the insulating layer and is electrically connected to the third semiconductor layer through the insulating layer. The third semiconductor layer and a part of the second semiconductor layer are removed in a region of the photoelectric conversion layer that does not overlap the insulating layer.

Abstract: A solid-state imaging device including a photoelectric conversion portion; a floating diffusion region; a transfer gate electrode made of an n-type semiconductor; a sidewall made of an n-type semiconductor formed on the photoelectric conversion portion side of the transfer gate electrode with an insulating film therebetween; and a sidewall made of an insulating layer formed on the floating diffusion region side of the transfer gate electrode.

Abstract: Embodiments of methods and apparatus are disclosed for obtaining an imaging array or a digital radiographic system including a plurality of pixels where at least one pixel can include a scan line, a bias line, a switching element including a first terminal, a second terminal, and a control electrode where the control electrode is electrically coupled to the scan line; and a photoelectric conversion element including a first terminal electrically coupled to the bias line and a second terminal electrically coupled to the first terminal of the switching element, and a signal storage element formed in the same layers as the scan line, bias line, the data line, the switching element and the photoelectric conversion element. An area of one terminal of the signal storage element can be larger than a surface area of the pixel.

Abstract: An imaging array comprises a photodetector layer, a readout IC (ROIC) layer, and a charge storage capacitor layer which is distinct from the photodetector and ROIC layers; the layers are electrically interconnected to form the array. The capacitors within the charge storage capacitor layer are preferably micromachined; the charge storage capacitor layer can be an interposer layer or an outer layer.

Abstract: According to one embodiment, an imaging device includes a semiconductor substrate having a first conductivity type, a well region which is arranged on a front surface side of the semiconductor substrate and has the first conductivity type, photodiodes which are arranged in the well region and have a second conductivity type, a diffusion layer which is arranged between the photodiodes, supplies a potential to the well region, and has the first conductivity type, an overflow drain layer which is arranged on a back surface side of the semiconductor substrate and has the second conductivity type, an overflow drain electrode which extends from the front surface side of the semiconductor substrate to the overflow drain layer and supplies a bias potential to the overflow drain layer from the front surface side of the semiconductor substrate, and a wiring layer which is arranged on the front surface of the semiconductor substrate.

Abstract: A solid-state imaging device includes: a first photodiode receiving light of a first color; a second photodiode that is arranged next to the first photodiode in a first direction and receives light of a second color; a third photodiode that is arranged next to the second photodiode in a second direction and receives light of the first color; a fourth photodiode that is arranged next to the third photodiode in the first direction and receives light of a third color; a first reset transistor for discharging a charge generated in the first photodiode and the second photodiode; and a second reset transistor for discharging a charge generated in the third photodiode and the fourth photodiode. The first photodiode and the third photodiode have a small difference in area.

Abstract: A microlens, an image sensor including the microlens, a method of forming the microlens and a method of manufacturing the image sensor are provided. The microlens includes a polysilicon pattern, having a cylindrical shape, formed on a substrate, and a round-type shell portion enclosing the polysilicon pattern. The microlens may further include a filler material filling an interior of the shell portion, or a second shell portion covering the first shell portion. The method of forming a microlens includes forming a silicon pattern on a semiconductor substrate having a lower structure, forming a capping film on the semiconductor substrate over the silicon pattern, annealing the silicon pattern and the capping film altering the silicon pattern to a polysilicon pattern having a cylindrical shape and the capping film to a shell portion for a round-type microlens, and filling an interior of the shell portion with a lens material through an opening between the semiconductor substrate and an edge of the shell portion.

Abstract: A solid-state image sensor includes a pixel region and peripheral circuit region arranged on a semiconductor substrate. The pixel region includes pixels. Each pixel includes a photoelectric conversion element and an amplification MOS transistor that outputs a signal corresponding to charges of the photoelectric conversion element to a column signal line. The peripheral circuit region includes a circuit that drives the pixel or processes the signal output to the column signal line. A resistance of a source region of the amplification MOS transistor is lower than a resistance of a drain region of the amplification MOS transistor.

Abstract: According to one embodiment, a semiconductor image pickup device includes a pixel area and a non-pixel area. The device includes a first photoelectric conversion element formed in the pixel area, a first transistor formed in the pixel area and connected to the first photoelectric conversion element, a second photoelectric conversion element formed in the non-pixel area, a second transistor formed in the non-pixel area and connected to the second photoelectric conversion element, a metal wire formed at least in the non-pixel area, a first cap layer formed on the metal wire to prevent diffusion of metal contained in the metal wire, and a dummy via wire formed in the non-pixel area and penetrating the first cap layer.

Abstract: A solid-state imaging device includes a semiconductor substrate including a pixel portion having a photoelectric conversion portion and a peripheral circuit portion; a first sidewall composed of a sidewall film and disposed on each sidewall of gate electrodes of MOS transistors in the pixel portion; a second sidewall composed of the sidewall film and disposed on each sidewall of gate electrodes of MOS transistors in the peripheral circuit portion; a first silicide blocking film composed of the sidewall film and disposed on the photoelectric conversion portion and a part of the MOS transistors in the pixel portion; and a second silicide blocking film disposed on the MOS transistors in the pixel portion so as to overlap with a part of the first silicide blocking film, wherein the MOS transistors in the pixel portion are covered with the first and second silicide blocking films.

Abstract: A display panel substrate includes a plurality of pixels, a pixel in the display panel substrate including a PIN diode for conducting therethrough a different electric current in accordance with an amount of light received by the light receiving element, a first inorganic insulating film formed on the PIN diode, a line formed on or above the first inorganic insulating film and electrically connected to the PIN diode, an organic insulating film formed on or above the line, a transparent pixel electrode formed on the organic insulating film, and a transparent cover electrode provided at such a position that the transparent electrode is located between the organic insulating film and the first inorganic insulating film and formed to cover at least a part of an I-layer of the PIN diode.

Abstract: A solid-state imaging device includes an imaging element and a logic element. The imaging element includes a first semiconductor substrate, a first wiring layer, and a first metal layer, in which a pixel region which is a light sensing surface is formed. The logic element includes a second semiconductor substrate, a second wiring layer, and a second metal layer, in which a signal processing circuit that processes a pixel signal obtained at the pixel region is formed. The logic element is laminated to the imaging element so that the first metal layer and the second metal layer are bonded to each other, and the first metal layer and the second metal layer are formed on a region excluding a region in which a penetrating electrode layer penetrating a bonding surface of the imaging element and the logic element is formed.

Abstract: A solid state imaging apparatus includes: a plurality of photoelectric conversion cells each including a plurality of photoelectric sections arranged in an array of at least two rows and two columns; a plurality of floating diffusion sections each being connected to each of ones of the photoelectric sections which are included in the same row of each said photoelectric conversion cell via each of a plurality of transfer transistors, and being shared by said ones of the photoelectric sections; a plurality of read-out lines each being selectively connected to at least two of the transfer transistors; and a plurality of pixel amplifier transistors each detecting and outputting the potential of each said the floating diffusion section. Charges of the photoelectric conversion sections each being connected to one of the read-out lines and being read out by the transfer transistors are read out by different floating diffusion sections.

Abstract: A photo-detecting device including a plurality of pixels, each including at least one alternate stack of photodiodes and electrically conducting electrodes. Each photodiode includes one intrinsic amorphous semiconductor layer in contact with one doped amorphous semiconductor layer distinct from the amorphous semiconductor layers in other photodiodes, and is arranged between two electrodes. Each pair of photodiodes includes one of the electrodes arranged between photodiodes. In each pixel: each electrode includes an electrically conducting portion not superposed on other electrodes of the pixel and electrically connected to one interconnection hole filled with an electrically conducting material; and portions of an electrically conducting material are superposed approximately on each of non-superposed portions of electrodes.

Abstract: A backside illuminated image sensor includes a photodiode, formed below the top surface of a semiconductor substrate, for receiving light illuminated from the backside of the semiconductor substrate to generate photoelectric charges, a reflecting gate, formed on the photodiode over the front upper surface of the semiconductor substrate, for reflecting light illuminated from the backside of the substrate and receiving a bias to control a depletion region of the photodiode, and a transfer gate for transferring photoelectric charges from the photodiode to a sensing node of a pixel.