Electron Emitter Manufacture Patents (Class 438/20)
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Publication number: 20110057164Abstract: A carbon nanotube field emission device with overhanging gate fabricated by a double silicon-on-insulator process. Other embodiments are described and claimed.Type: ApplicationFiled: June 17, 2008Publication date: March 10, 2011Applicant: CALIFORNIA INSTITUTE OF TECHNOLOGYInventors: Risaku Toda, Michael J. Bronikowski, Edward M. Luong, Harish Manohara
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Patent number: 7902541Abstract: A semiconductor nanowire having two semiconductor pads on both ends is suspended over a substrate. Stress-generating liner portions are formed over the two semiconductor pads, while a middle portion of the semiconductor nanowire is exposed. A gate dielectric and a gate electrode are formed over the middle portion of the semiconductor nanowire while the semiconductor nanowire is under longitudinal stress due to the stress-generating liner portions. The middle portion of the semiconductor nanowire is under a built-in inherent longitudinal stress after removal of the stress-generating liners because the formation of the gate dielectric and the gate electrode locks in the strained state of the semiconductor nanowire. Source and drain regions are formed in the semiconductor pads to provide a semiconductor nanowire transistor. A middle-of-line (MOL) dielectric layer may be formed directly on the source and drain pads.Type: GrantFiled: April 3, 2009Date of Patent: March 8, 2011Assignee: International Business Machines CorporationInventors: Lidija Sekaric, Dureseti Chidambarrao, Xiao H. Liu
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Publication number: 20110049474Abstract: An indirectly induced tunnel emitter for a tunneling field effect transistor (TFET) structure includes an outer sheath that at least partially surrounds an elongated core element, the elongated core element formed from a first semiconductor material; an insulator layer disposed between the outer sheath and the core element; the outer sheath disposed at a location corresponding to a source region of the TFET structure; and a source contact that shorts the outer sheath to the core element; wherein the outer sheath is configured to introduce a carrier concentration in the source region of the core element sufficient for tunneling into a channel region of the TFET structure during an on state.Type: ApplicationFiled: August 31, 2009Publication date: March 3, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Mikael T. Bjoerk, Siegfried F. Karg, Joachim Knoch, Heike E. Reil, Walter H. Riess, Paul M. Solomon
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Publication number: 20110031867Abstract: Disclosed herein is a triode-type field emission device, in particular for high frequency applications, having a cathode electrode, an anode electrode spaced from the cathode electrode, a control gate electrode arranged between the anode electrode and the cathode electrode, and at least a field-emitting tip; the cathode, control gate and anode electrodes overlapping in a triode area at the field-emitting tip and being operable to cooperate with the field-emitting tip for generation of an electron beam in the triode area. The cathode, control gate and anode electrodes do not overlap outside the triode area, and have a main direction of extension along a respective line; each of these respective lines being inclined at a non-zero angle with respect to each one of the others.Type: ApplicationFiled: December 28, 2007Publication date: February 10, 2011Inventors: Aldo Di Carlo, Claudio Paoloni, Eleonora Petrolati, Francesca Brunetti, Riccardo Riccitelli
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Patent number: 7879308Abstract: A multi-wall carbon nanotube field emitter and method of producing the same is disclosed. The multi-wall carbon nanotube field emitter comprises a nanotube having a diameter between approximately 1 nanometer and approximately 100 nanometers with an integrally attached outer layer of graphitic material that is approximately 1 micrometer to approximately 10 micrometers in diameter attached to an etched tip of a wire. The tip of the wire is etched to form a tip and a slot is fabricated in the tip for alignment and attachment of the carbon nanotube. A focus ion beam is used to weld the nanotube to the tungsten tip for electron field emission applications.Type: GrantFiled: April 4, 2005Date of Patent: February 1, 2011Assignee: University of Central Florida Research Foundation, Inc.Inventors: Leo Chow, Guangyu Chai
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Patent number: 7875469Abstract: A method of operating and process for fabricating an electron source. A conductive rod is covered by an insulating layer, by dipping the rod in an insulation solution, for example. The rod is then covered by a field emitter material to form a layered conductive rod. The rod may also be covered by a second insulating material. Next, the materials are removed from the end of the rod and the insulating layers are recessed with respect to the field emitter layer so that a gap is present between the field emitter layer and the rod. The layered rod may be operated as an electron source within a vacuum tube by applying a positive bias to the rod with respect to the field emitter material and applying a higher positive bias to an anode opposite the rod in the tube. Electrons will accelerate to the charged anode and generate soft X-rays.Type: GrantFiled: December 12, 2007Date of Patent: January 25, 2011Assignee: Cabot Microelectronics CorporationInventor: Heinz H. Busta
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Patent number: 7868531Abstract: A method for preparation of carbon nanotubes (CNTs) bundles for use in field emission devices (FEDs) includes forming a plurality of carbon nanotubes on a substrate, contacting the carbon nanotubes with a polymer composition comprising a polymer and a solvent, and removing at least a portion of the solvent so as to form a solid composition from the carbon nanotubes and the polymer to form a carbon nanotube bundle having a base with a periphery, and an elevated central region where, along the periphery of the base, the carbon nanotubes slope toward the central region.Type: GrantFiled: May 5, 2006Date of Patent: January 11, 2011Assignee: Brother International CorporationInventor: Kangning Liang
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Patent number: 7842522Abstract: Composition of carbon nanotubes (CNTs) are produced into inks that are dispensable via ink jet or other deposition processes. The CNT ink is dispensed into wells and allowed to dry so as to formed a cathode structure. It is important to note that after the CNT ink is deposited to form a cathode structure, no further post-deposition processes are performed, such as the removal of sacrificial layers, which could damage the CNT ink.Type: GrantFiled: September 9, 2004Date of Patent: November 30, 2010Assignee: Applied Nanotech Holdings, Inc.Inventors: Yunjun Li, Richard Lee Fink, Mohshi Yang, Zvi Yaniv
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Patent number: 7838318Abstract: The present invention relates to a photodiode of an image sensor using a three-dimensional multi-layer substrate, and more particularly, to a method of implementing a buried type photodiode and a structure thereof, and a trench contact method for connecting a photodiode in a multi-layer substrate and a transistor for signal detection.Type: GrantFiled: March 11, 2008Date of Patent: November 23, 2010Assignee: Lumiense Photonics, Inc.Inventor: Robert Steven Hannebauer
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Patent number: 7829358Abstract: Embodiments of an LED disclosed has an emitter layer shaped to a controlled depth or height relative to a substrate of the LED to maximize the light output of the LED and to achieve a desired intensity distribution. In some embodiments, the exit face of the LED may be selected to conserve radiance. In some embodiments, shaping the entire LED, including the substrate and sidewalls, or shaping the substrate alone can extract 100% or approximately 100% of the light generated at the emitter layers from the emitter layers. In some embodiments, the total efficiency is at least 90% or above. In some embodiments, the emitter layer can be shaped by etching, mechanical shaping, or a combination of various shaping methods. In some embodiments, only a portion of the emitter layer is shaped to form the tiny emitters. The unshaped portion forms a continuous electrical connection for the LED.Type: GrantFiled: February 6, 2009Date of Patent: November 9, 2010Assignee: Illumitex, Inc.Inventors: Dung T. Duong, Paul N. Winberg, Matthew R. Thomas, Elliot M. Pickering, Muhammad Khizar
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Patent number: 7816155Abstract: A method for mounting a semiconductor device onto a composite substrate, including a submount and a heat sink, is described. According to one aspect of the invention, the materials for the submount and the heat sink are chosen so that the value of coefficient of thermal expansion of the semiconductor device is in between the values of coefficients of thermal expansion of the materials of the submount and the heat sink, the thickness of the submount being chosen so as to equalize thermal expansion of the semiconductor device to that of the surface of the submount the device is mounted on. According to another aspect of the invention, the semiconductor device, the submount, and the heat sink are soldered into a stack at a single step of heating, which facilitates reduction of residual post-soldering stresses.Type: GrantFiled: July 2, 2008Date of Patent: October 19, 2010Assignee: JDS Uniphase CorporationInventors: Andre Wong, Sukbhir Bajwa
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Patent number: 7814566Abstract: A fabricating method of a structure having nano-hole is provided. The fabricating method includes: providing a substrate, forming a photoresist layer on the substrate, forming an opening, and performing a heat treatment process on the photoresist layer to shrink the opening to form a nano-hole. The structure having nano-hole fabricated by the method of the present invention can be used to fabricate a nano-tip having a diameter of tip-body of no more than 10 nm, high aspect ratio, and a uniform diameter of tip-body.Type: GrantFiled: April 20, 2007Date of Patent: October 12, 2010Assignee: Industrial Technology Research InstituteInventor: Wei-Su Chen
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Publication number: 20100252804Abstract: A field emission cathode assembly that has a UV-blocking, insulating dielectric layer (3.4).Type: ApplicationFiled: November 26, 2008Publication date: October 7, 2010Applicant: E.I DU PONT DE NEMOURS AND COMPANYInventors: Lap-Tak Andrew Cheng, Adam Fennimore
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Patent number: 7808174Abstract: A light-emitting diode (1) has a first electrode (3), a second electrode (4), a light-emitting layer (5) which comprises a matrix, and ions. A layer (6) of a cation receptor (CR) is positioned adjacent to the first electrode (3), has captured cations, and has generated immobilized cations (+). A layer (7) of an anion receptor (AR) is positioned adjacent to the second electrode (4), has captured anions, and has generated immobilized anions (?). The ion gradients provide for quick response in emission of light (L) when the diode (1) is exposed to a forward bias. A diode (1) is manufactured by first forming a laminate (2) of the above structure. The laminate (2) is exposed to a forward bias to make the ions become immobilized at respective sites (S1, S2) of the respective receptors (CR, AR).Type: GrantFiled: January 13, 2006Date of Patent: October 5, 2010Assignee: Koninklijke Philips Electronics N.V.Inventors: Eduard Johannes Meijer, Eric Alexander Meulenkamp, Ralph Kurt, Steve Klink
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Patent number: 7807482Abstract: The invention concerns a method for preparing a thin layer (28) or a chip to be transferred onto another substrate, this method including the realization, above the surface of said thin layer or said chip, of at least one layer, called adhesive layer (25), and of at least one layer, called first barrier layer (22), the adhesive layer being made of a material of which etching presents selectivity in relation to the material of the barrier layer.Type: GrantFiled: June 2, 2005Date of Patent: October 5, 2010Assignee: S.O.I.Tec Silicon On Insulator TechnologiesInventors: Bernard Aspar, Chrystelle Lagahe-Blanchard
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Patent number: 7799707Abstract: Methods of forming a gated, self-aligned nano-structures for electron extraction are disclosed. One method of forming the nano-structure comprises irradiating a first surface of a thermally conductive laminate to melt an area across the first surface of the laminate. The laminate comprises a thermally conductive film and a patterned layer disposed on the first surface of the film. The patterned layer has a pattern formed therethrough, defining the area for melting. The film is insulated at a second surface thereof to provide two-dimensional heat transfer laterally in plane of the film. The liquid density of the film is greater than the solid density thereof. The method further comprises cooling the area inwardly from the periphery thereof to form the nano-structure having an apical nano-tip for electron emission centered in an electrically isolated aperture that serves as a gate electrode to control electron extraction in a gated field emitter device.Type: GrantFiled: August 1, 2008Date of Patent: September 21, 2010Assignee: Wayne State UniversityInventors: Ronald J. Baird, Daniel G. Georgiev, Ivan Avrutsky, Golam Newaz, Gregory W. Auner
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Patent number: 7785907Abstract: A method for manufacturing a cathode assembly of a field emission display, includes the steps of: providing a substrate (110) with a cathode (113) formed thereon; forming an electrically insulating layer (120), a gate electrode layer (130) and a photoresist layer (140) on a cathode in series; defining at least one opening (141) in the photoresist layer using a photolithographic process; etching the gate electrode layer through the at least one opening so as to form at least one gate electrode opening (131) in the gate electrode layer; etching the electrically insulating layer to define at least one cavity (121) in the electrically insulating layer; pressing the photoresist layer in a manner such that a size of the at least one opening is reduced; depositing a catalyst layer (170) in the at least one cavity through the at least one opening; and growing carbon nanotubes (180) on the catalyst layer.Type: GrantFiled: November 3, 2006Date of Patent: August 31, 2010Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.Inventors: Zhi Zheng, Shou-Shan Fan
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Patent number: 7772584Abstract: A semiconductor device has lateral conductors or traces that are formed of nanotubes such as carbon. A sacrificial layer is formed overlying the substrate. A dielectric layer is formed overlying the sacrificial layer. A lateral opening is formed by removing a portion of the dielectric layer and the sacrificial layer which is located between two columns of metallic catalysts. The lateral opening includes a neck portion and a cavity portion which is used as a constrained space to grow a nanotube. A plasma is used to apply electric charge that forms an electric field which controls the direction of formation of the nanotubes. Nanotubes from each column of metallic catalyst are laterally grown and either abut or merge into one nanotube. Contact to the nanotube may be made from either the neck portion or the columns of metallic catalysts.Type: GrantFiled: April 8, 2008Date of Patent: August 10, 2010Assignee: Freescale Semiconductor, Inc.Inventors: Marius K. Orlowski, Shahid Rauf, Peter L. G. Ventzek
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Patent number: 7759138Abstract: A method of fabricating a microchannel plate includes forming a plurality of pores in a silicon substrate. The plurality of pores is oxidized, thereby consuming silicon at surfaces of the plurality of pores and forming a silicon dioxide layer over the plurality of pores. At least a portion of the silicon dioxide layer is stripped, which reduces a surface roughness of the plurality of pores. A semiconducting layer can be deposited onto the surface of the silicon dioxide layer. The semiconducting layer is then oxidized, thereby consuming at least some of the polysilicon or amorphous silicon layer and forming an insulating layer. Resistive and secondary electron emissive layers are then deposited on the insulating layer by atomic layer deposition.Type: GrantFiled: September 20, 2008Date of Patent: July 20, 2010Assignee: Arradiance, Inc.Inventors: David Beaulieu, Neal T. Sullivan
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Patent number: 7713765Abstract: A method for manufacturing a semiconductor device having a compound semiconductor layer that is provided on a substrate and includes a cladding layer of a first conductivity type, an activation layer, a cladding layer of a second conductivity type that is the opposite of the first conductivity type, includes the steps of: forming a diffusion source layer on the compound semiconductor layer; forming a first diffusion region in the compound semiconductor layer by carrying out a first heat treatment, so that the first diffusion region includes a light emitting facet for emitting light from the activation layer; removing the diffusion source layer; forming a first SiN film having a refractive index of 1.9 or higher on the compound semiconductor layer; and turning the first diffusion region into the second diffusion region by carrying out a second heat treatment.Type: GrantFiled: July 28, 2008Date of Patent: May 11, 2010Assignee: Eudyna Devices Inc.Inventors: Takeshi Sakashita, Masanori Saito
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Patent number: 7700384Abstract: An object is to provide a nitride semiconductor light emitting device capable of attaining high light emission output while lowering Vf, as well as to provide a manufacturing method thereof.Type: GrantFiled: February 15, 2007Date of Patent: April 20, 2010Assignee: Sharp Kabushiki KaishaInventor: Satoshi Komada
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Patent number: 7700269Abstract: A method of forming a stacked structure in an electronic device, where a photoresist for performing multi-patterning processes is used. Also, a method of manufacturing a FED in which different structures can be multi-patterned by using a single photoresist mask. The photoresist has a solubility to a solvent by heat-treatment after exposure, and a complicated structure can be formed using the photoresist.Type: GrantFiled: May 17, 2006Date of Patent: April 20, 2010Assignees: Samsung SDI Co., Ltd., E. I. du Pont de Nemours and CompanyInventors: Shang-Hyeun Park, Hang-Woo Lee, Young-Hwan Kim
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Patent number: 7688497Abstract: A multi-layer film (300), useful as a barrier film in electro-optic displays, comprises a light-transmissive adhesive layer (316), a light-transmissive first protective layer (312), a light-transmissive first moisture barrier layer (308B), an intermediate layer (typically an adhesive layer) (310), a light-transmissive second moisture barrier layer (308A) and a light-transmissive second protective layer (306). The second protective layer may be covered by a hard coat (304) and/or a masking film (302).Type: GrantFiled: April 30, 2008Date of Patent: March 30, 2010Assignee: E Ink CorporationInventors: Guy M. Danner, Matthew Joseph Kayal, Henry Ware Gale
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Publication number: 20100075445Abstract: A method of fabricating a microchannel plate includes forming a plurality of pores in a silicon substrate. The plurality of pores is oxidized, thereby consuming silicon at surfaces of the plurality of pores and forming a silicon dioxide layer over the plurality of pores. At least a portion of the silicon dioxide layer is stripped, which reduces a surface roughness of the plurality of pores. A semiconducting layer can be deposited onto the surface of the silicon dioxide layer. The semiconducting layer is then oxidized, thereby consuming at least some of the polysilicon or amorphous silicon layer and forming an insulating layer. Resistive and secondary electron emissive layers are then deposited on the insulating layer by atomic layer deposition.Type: ApplicationFiled: September 20, 2008Publication date: March 25, 2010Applicant: ARRADIANCE, INC.Inventors: David Beaulieu, Neal T. Sullivan
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Patent number: 7674149Abstract: Methods are provided for fabricating field emitters by using laser-induced re-crystallization. A substrate is first provided on which a silicon-containing layer is formed. A plurality of extrusive tips are thereafter formed to be extruded from the surface of the silicon-containing layer by using laser-induced re-crystallization. The methods of the laser-induced re-crystallization include a step of subjecting the overall or partial silicon-containing layer to an energy source, either unpatterned or patterned.Type: GrantFiled: April 21, 2005Date of Patent: March 9, 2010Assignee: Industrial Technology Research InstituteInventor: Yu-Cheng Chen
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Patent number: 7651875Abstract: Nanostructured surface materials having patterned indents are disclosed and there use for catalytic, therapeutic, herbicidal, pesticidal, antiviral, antibacterial and antifungal applications is disclosed.Type: GrantFiled: August 2, 2005Date of Patent: January 26, 2010Assignee: Borealis Technical LimitedInventors: Stuart Harbron, Michael Dov Hammer, Larissa Jangidze, Avto Tavkhelidze
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Publication number: 20100009474Abstract: A method of growing carbon nanotubes and a method of manufacturing a field emission device using the same is provided. The method of growing carbon nanotubes includes steps of preparing a substrate, forming a catalyst metal layer on the substrate to promote growing of carbon nanotubes, forming an inactivation layer on the catalyst metal layer to reduce the activity of the catalyst metal layer, and growing carbon nanotubes on a surface of the catalyst metal layer. Because the inactivation layer partially covers the catalyst metal layer, carbon nanotubes are grown on a portion of the catalyst metal layer that is not covered by the inactivation layer. Thus, density of the carbon nanotubes can be controlled. This method for growing carbon nanotubes can be used to make an emitter of a field emission device. The field emission device having carbon nanotube emitter made of this method has superior electron emission characteristics.Type: ApplicationFiled: June 29, 2006Publication date: January 14, 2010Inventors: Ha-Jin Kim, Sang-Mock Lee
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Patent number: 7645622Abstract: A method of producing a nitride-based semiconductor device includes the steps of growing an InxAlyGa1-x-yN (0?x, 0?y, x+y<1) buffer layer (2; 12; 22; 32; 42) on a substrate (1; 11; 21; 31; 41) at a first substrate temperature, and growing a first conductivity type nitride-based semiconductor layer (4; 14; 24; 34; 44) on the buffer layer at a second substrate temperature. The first temperature is higher than the second temperature.Type: GrantFiled: April 20, 2006Date of Patent: January 12, 2010Assignee: Sharp Kabushiki KaishaInventors: Mayuko Fudeta, Hiroshi Nakatsu
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Patent number: 7642107Abstract: A pixel with a photosensor and a transfer transistor having a split transfer gate. A first section of the transfer gate is connectable to a first voltage source while a second section of the transfer gate is connectable to a second voltage source. Thus, during a charge integration period of a photosensor, the two sections of the transfer gate may be oppositely biased to decrease dark current while controlling blooming of electrons within and out of the pixel cell. During charge transfer the two gate sections may be commonly connected to a positive voltage sufficient to transfer charge from the photosensor to a floating diffusion region.Type: GrantFiled: December 21, 2006Date of Patent: January 5, 2010Assignee: Aptina Imaging CorporationInventor: John Ladd
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Publication number: 20090325330Abstract: A method and an apparatus for manufacturing a high intensity electron emitting device using a boron lanthanum compound thin film are provided. An electron emitting base member region is opened in a second substrate disposed with an electron emitting base member, and is applied with a mask screening another region, thereby sputter-accumulating the sputtered particles of a low work function substance target. The second substrate sputter-accumulated and a first substrate disposed with phosphor are sealed by a sealing agent to fabricate a vacuum chamber. During the fabrication step, the first and second substrates are consistently maintained in a vacuum atmosphere or a reduced pressure atmosphere.Type: ApplicationFiled: February 12, 2009Publication date: December 31, 2009Applicant: CANON ANELVA CORPORATIONInventor: Masaki Kuribayashi
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Publication number: 20090325329Abstract: A method and an apparatus for manufacturing a high intensity electron emitting device using a boron lanthanum compound thin film are provided. Sputtered particles of a low work function substance target are accumulated on a second substrate disposed an electron emitting base member. By using a mask for screening the electron emitting base member region opening other regions, the deposition of a low work function substance on the second substrate is etched, and after that, the second substrate and the first substrate disposed with the phosphor are sealed by a sealing agent to fabricate a vacuum chamber. During the fabrication step thereof, the first and second substrates are consistently maintained in a vacuum atmosphere or a reduced pressure.Type: ApplicationFiled: February 11, 2009Publication date: December 31, 2009Applicant: CANON ANELVA CORPORATIONInventor: Masaki Kuribayashi
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Publication number: 20090317926Abstract: A method for making transmission electron microscope gird is provided. An array of carbon nanotubes is provided and drawing a carbon nanotube film from the array of carbon nanotubes. A substrate has a plurality of spaced metal girds attached on the substrate. The metal girds are covered with the carbon nanotube film and treating the carbon nanotube film and the metal girds with organic solvent. A transmission electron microscope (TEM) grid is obtained by removing remaining CNT film.Type: ApplicationFiled: December 19, 2008Publication date: December 24, 2009Applicants: TSINGHUA UNIVERSITY, HON HAI PRECISION INDUSTRY CO., LTD.Inventors: LI-NA ZHANG, ZHUO CHEN, CHEN FENG, LIANG LIU, KAI-LI JIANG, QUN-QING LI, SHOU-SHAN FAN
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Patent number: 7622314Abstract: A method of making a carbon nanotube structure includes forming a plurality of carbon nanotubes and contacting the carbon nanotubes with a polymer. A solid composition is formed from the carbon nanotubes and polymer and then shaped. For example, the solid composition can be shaped into an elongated structure such as a filament, wire, rope, cable, and the like. In at least some instances, at least some, or all, of the polymer is removed from the solid composition after it is shaped.Type: GrantFiled: May 5, 2006Date of Patent: November 24, 2009Assignee: Brother International CorporationInventor: Kangning Liang
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Publication number: 20090280585Abstract: A method for forming high density emission elements and field emission displays formed according to the method. Oxygen and a silicon etchant are introduced into a plasma etching chamber containing a silicon substrate. The oxygen reacts with the silicon surface to form regions of silicon dioxide, while the silicon etchant etches the silicon to form the emission elements. The silicon dioxide regions mask the underlying silicon during the silicon etch process. High density and high aspect ratio emission elements are formed without using photolithographic processes. The emission elements formed according to the present invention provide a more uniform emission of electrons. Further, a display incorporating emission elements formed according to the present invention provides increased brightness. The reliability of the display is increased due to the use of a plurality of emission elements to supply electrons for stimulating the phosphor substrate material to produce the image.Type: ApplicationFiled: July 20, 2009Publication date: November 12, 2009Applicant: Agere Systems Inc.Inventors: Seong Jin Koh, Gerald W. Gibson, JR.
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Patent number: 7608905Abstract: An apparatus has multiple sets of independently addressable interdigitated nanowires. Nanowires of a set are in electrical communication with other nanowires of the same set and are electrically isolated from nanowires of other sets.Type: GrantFiled: October 17, 2006Date of Patent: October 27, 2009Assignee: Hewlett-Packard Development Company, L.P.Inventors: Alexandre Bratkovski, Amir A. Yasseri, R. Stanley Williams
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Publication number: 20090260684Abstract: A method for forming emitter layer of a solar cell includes preparing a substrate including a first impurity of a first conductive type, diffusing a second impurity of a second conductive type opposite to the first conductive type in the substrate to form a first emitter portion of the emitter layer in the substrate, and selectively heating a portion of the first emitter portion, which corresponds to a position for forming at least one electrode, to form a second emitter portion.Type: ApplicationFiled: April 17, 2009Publication date: October 22, 2009Inventor: JaeSung YOU
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Publication number: 20090263920Abstract: The invention relates to a method for protecting the interior of at least one cavity (4) having a portion of interest (5) and opening onto a face of a microstructured element (1), consisting of depositing, on said face, a nonconformal layer (6) of a protective material, in which said nonconformal layer closes off the cavity without covering the portion of interest. The invention also relates to a method for producing a device comprising such a microstructured element.Type: ApplicationFiled: April 3, 2007Publication date: October 22, 2009Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUEInventors: Barbara Charlet, Helene Le Poche, Yveline Gobil
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Publication number: 20090258448Abstract: A method for making the thermal electron emitter includes following steps. Providing a carbon nanotube film including a plurality of carbon nanotubes. Treating the carbon nanotube film with a solution comprising of a solvent and compound or a precursor of a compound, wherein the compound and the compound that is the basis of the precursor of a compound has a work function that is lower than the carbon nanotubes. Twisting the treated carbon nanotube film to form a carbon nanotube twisted wire. Drying the carbon nanotube twisted wire. Activating the carbon nanotube twisted wire.Type: ApplicationFiled: March 12, 2009Publication date: October 15, 2009Applicants: Tsinghua University, HON HAI Precision Industry CO., LTD.Inventors: Lin Xiao, Liang Liu, Chang-Hong Liu, Shou-Shan Fan
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Publication number: 20090246895Abstract: Provided are methods and apparatus for combining light emitters and devices including the same. Embodiments include methods of selecting combinations of multiple light emitters that are grouped into multiple bins. The multiple bins correspond to multiple emitter group regions in a multiple axis color space and multiple luminosity ranges. Such methods may include prioritizing multiple combinations of light emitters from at least two of the bins, each of the combinations including chromaticity values corresponding to a desired color region and a luminosity value corresponding to a specified luminosity range.Type: ApplicationFiled: March 28, 2008Publication date: October 1, 2009Inventors: Chenhua You, John Roberts
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Patent number: 7595206Abstract: A semiconductor light emitting device can have stable electric characteristics and can emit light with high intensity from a substrate surface. The device can include a transparent substrate and a semiconductor layer on the substrate. The semiconductor layer can include a first conductive type semiconductor layer, a luminescent layer, a second conductive type semiconductor layer, and first and second electrodes disposed to make contact with the first and second conductive type semiconductor layers, respectively. The first conductive type semiconductor layer, the luminescent layer, and the second conductive type semiconductor layer can be laminated in order from the side adjacent the substrate. An end face of the semiconductor layer can include a first terrace provided in an end face of the first conductive type semiconductor layer in parallel with the substrate surface, and an inclined end face region provided nearer to the substrate than the first terrace.Type: GrantFiled: February 14, 2008Date of Patent: September 29, 2009Assignee: Stanley Electric Co., Ltd.Inventors: Naochika Horio, Munehiro Kato, Masahiko Tsuchiya, Satoshi Tanaka
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Patent number: 7595498Abstract: The present invention provides an electromagnetic wave generation apparatus that is compact and generates a high power terahertz wave. An electromagnetic wave generation apparatus includes: a substrate; a first electrode, having a photoelectron emitting part, formed on one of the surfaces of the substrate; a second electrode formed on the surface of the substrate; a power supply source that applies voltage to between the first electrode and the second electrode so that the potential of the second electrode becomes higher than the potential of the first electrode; and a light source that radiates one of time modulated light and wavelength modulated light, and in the apparatus, the photoelectron emitting part (a) emits electrons when light is irradiated and (b) is placed at a position which an incident light from the light source enters and from which the emitted electrons run to the electron incidence plane of the second electrode.Type: GrantFiled: August 3, 2005Date of Patent: September 29, 2009Assignee: Panasonic CorporationInventors: Shinichi Takigawa, Daisuke Ueda
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Patent number: 7592191Abstract: A field emission backplate formed by laser crystallizing of an area of amorphous semiconductor based material. Emitter sites result from the rough surface texture caused by the crystallization process. The crystallization may be localized using laser interferometry, and profiled emitter tips grown on the localized crystalline areas. Such backplates can be used in field emission devices emitting into either a vacuum or a wide band gap light-emitting polymer. Furthermore, a backplate having self-aligned gates can be formed by depositing an insulator layer and a metal layer over the emitter tips, removing the top of the metal layer and etching away the insulator, leaving each tip surrounded by a metal rim. A planarizing agent can be used to refine this process.Type: GrantFiled: February 6, 2004Date of Patent: September 22, 2009Assignee: The University Court of the University of DundeeInventors: Mervyn John Rose, Ravi Silva, John Shannon
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Patent number: 7585687Abstract: A field emission device, which among other things may be used within an ultra-high density storage system, is disclosed. The emitter device includes an emitter electrode, an extractor electrode, and a solid-state field controlled emitter that utilizes a Schottky metal-semiconductor junction or barrier. The Schottky metal-semiconductor barrier is formed on the emitter electrode and electrically couples with the extractor electrode such that when an electric potential is placed between the emitter electrode and the extractor electrode, a field emission of electrons is generated from an exposed surface of the semiconductor layer. Further, the Schottky metal may be selected from typical conducting layers such as platinum, gold, silver, or a conductive semiconductor layer that is able to provide a high electron pool at the barrier.Type: GrantFiled: September 1, 2004Date of Patent: September 8, 2009Assignee: Hewlett-Packard Development Company, L.P.Inventors: Henryk Birecki, Vu Thien Binh, Si-ty Lam, Huei Pei Kuo, Steven L. Naberhuis
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Publication number: 20090200912Abstract: Methods for growing carbon nanotubes on single crystal substrates are disclosed. A method of producing a nanostructure material comprises coating a single crystal substrate with a catalyst film to form a catalyst coated substrate; annealing the catalyst film by supplying a first promoter gas to the catalyst coated substrate at a first temperature and a first pressure; and supplying a second promoter gas and a carbon-source gas to the catalyst coated substrate in a substantially water-free atmosphere at a second pressure and a second temperature for a time period to cause growth of nanostructures on the catalyst coated substrate. The nanostructure material is used in various applications.Type: ApplicationFiled: October 20, 2006Publication date: August 13, 2009Inventors: Zhifeng Ren, Guangyong Xiong, Dezhi Wang, Baoqing Zeng
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Publication number: 20090161420Abstract: Embodiments of the present invention include systems and methods for three-terminal field-emitter triode devices, and memory arrays utilizing the same. In other embodiments, the field-emitter devices include a volume-change material, capable of changing a measurable electrical property of the devices, and/or three-dimensional memory arrays of the same.Type: ApplicationFiled: December 19, 2008Publication date: June 25, 2009Inventor: Daniel R. Shepard
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Patent number: 7544523Abstract: A method of batch fabrication using established photolithographic techniques allowing nanoparticles or nanodevices to be fabricated and mounted into a macroscopic device in a repeatable, reliable manner suitable for large-scale mass production. Nanoparticles can be grown on macroscopic “modules” which can be easily manipulated and shaped to fit standard mounts in various devices.Type: GrantFiled: February 28, 2006Date of Patent: June 9, 2009Assignee: FEI CompanyInventors: Gregory Schwind, Gerald Magera, Lawrence Scipioni
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Patent number: 7538015Abstract: Disclosed herein are a method of producing microstructure and a method of producing mold, the methods permitting production of much smaller pores than before in an atmosphere where impurities are negligible and also permitting production of microstructures having a smaller size and a higher crystallinity than before with the help of the pores. The method of producing microstructure comprises a step of making pores (4) in a substrate (1) to become a mold (5) by irradiation with a focused energy beam (3) and a step of growing a microstructure (8) in the thus made pores (4). The method of producing a mold includes a step of making pores (4) by irradiating a substrate (1) to become a mold (5) with a focused energy beam (3).Type: GrantFiled: November 25, 2003Date of Patent: May 26, 2009Assignee: Sony CorporationInventors: Koji Kadono, Yosuke Murakami
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Publication number: 20090117674Abstract: A method for manufacturing a field emission electron source includes: providing a CNT array; drawing a bundle of CNTs from the CNT array to form a CNT yarn; soaking the CNT yarn into an organic solvent, and shrinking the CNT yarn into a CNT string after the organic solvent volatilizing; applying a voltage between two opposite ends of the CNT string, until the CNT string snapping at a certain point; and attaching the snapped CNT string to a conductive base, and achieving a field emission electron source. The field emission efficiency of the field emission electron source is high.Type: ApplicationFiled: December 29, 2007Publication date: May 7, 2009Inventors: Yang Wei, Liang Liu, Shou-Shan Fan
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Patent number: 7527988Abstract: A field emission display device and a method of fabricating the same are provided. The field emission display device may include a substrate, a transparent cathode layer, an insulation layer, a gate electrode, a resistance layer, and carbon nanotubes. The transparent cathode layer is deposited on the substrate. The insulation layer is formed on the cathode layer and has a well exposing the cathode layer. The gate electrode is formed on the insulation layer and has an opening corresponding to the well. The resistance layer is formed to surround the surface of the gate electrode and the inner walls of the opening and the well so as to block ultraviolet rays. The carbon nanotube field emitting source is positioned on the exposed cathode layer.Type: GrantFiled: September 27, 2004Date of Patent: May 5, 2009Assignee: Samsung SDI Co., Ltd.Inventors: Hang-woo Lee, Sang-jin Lee, Shang-hyeun Park
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Publication number: 20090098671Abstract: Nanotube assemblies and methods for manufacturing the same, including one or more protective layers. A nanotube assembly may include a substrate, a nanotube array, formed on the substrate, and a protective layer, formed on a first area of the substrate where the nanotube array is not, the protective layer reducing the formation of nanocones, and promoting the formation of nanotubes, which make up the nanotube array.Type: ApplicationFiled: September 19, 2008Publication date: April 16, 2009Inventors: Dong-Wook Kim, Li-Han Chen, Sungho Jin, In Kyung Yoo