Abstract: There is disclosed a semiconductor processing apparatus comprising a process chamber treating a substrate, a process gas feeder feeding a process gas to the process chamber, a first vacuum pump exhausting the process chamber, a second vacuum pump inhaling gas on an exhaust side of the first vacuum pump, and a circulation path circulating at least a part of the process gas exhausted from the process chamber via the first vacuum pump into the process chamber, wherein the circulation path is provided with a dust trapping mechanism, the dust trapping mechanism being capable of substantially maintaining a conductance of the circulation path before and after the capture of dust.

Abstract: To produce a SiC crystal in a shape which is used as a wafer, a guide is disposed around a SiC crystal substrate so as to cover a peripheral portion of the SiC crystal substrate. Temperature of the guide may be made higher than the sublimation temperature of the SiC when a SiC crystal is disposed upon and caused to grow on the SiC crystal substrate, thereby controlling and restricting the SiC crystal growth in the direction of the guide. Additionally, when the guide is formed in a substantially hexagonal tube shape, the SiC crystal can be produced in a hexagonal pole shape. In this case, when alignment is made between each diagonal passing through a center of the hexagon shape of the guide and specific direction (<11{overscore (2)}0> or <1{overscore (1)}00> of the SiC crystal substrate), the SiC crystal becomes aligned accordingly.

Abstract: A method of manufacturing a diode assembly used in rectifier assemblies of engine-driven generators is disclosed. The diode assemblies have diode cups, semiconductor diode dies and diode leads fitted therein. The diode subassemblies are reflow soldered, such that the semiconductor diode die and diode lead are reflow soldered within a diode cup in an argon/hydrogen atmosphere. In another aspect of the present invention, a lead loader having a removable lead holder that holds diode leads therein is positioned over a diode boat such that the diode leads are aligned with respective diode cups. The lead holder is slid from the lead loader so that the diode leads fall into the center cups which also have the semiconductor die positioned therein. The diode boat is inserted within a furnace for reflow soldering.

Abstract: A method of silicon layer deposition using a cyclical deposition process. The cyclical deposition process comprises alternately adsorbing a silicon-containing precursor and a reducing gas on a substrate structure. Thin film transistors, such as for example a bottom-gate transistor or a top-gate transistor, including one or more silicon layers may, be formed using such cyclical deposition techniques.

Abstract: A method of reducing undesired topographic features, increasing film density, and/or increasing adhesion to an underlying substrate in a polymer film formed on a microelectronic substrate, comprises: (a) providing a microelectronic substrate, the substrate having a polymer film deposited thereon; (b) contacting the substrate to carbon dioxide (optionally containing additional ingredients such as cosolvents or chemical intermediates); and (c) elevating the pressure of the carbon dioxide to plasticize the polymer film and reduce undesired topographic features, increase film density, and/or increase adhesion of the film to the underlying substrate.

Abstract: A method of preventing formation of titanium oxide within a semiconductor device structure during a high temperature treatment of the device structure includes forming a passivation layer to preclude formation of titanium oxide at a titanium/oxide interface of a semiconductor device structure. The method includes providing a substrate assembly including at least an oxide region and forming a layer of titanium over a surface of the oxide region. The oxide region surface is treated with a plasma comprising nitrogen prior to forming the titanium layer so as to form a passivation layer upon which the titanium layer is formed. A thermal treatment is performed on the substrate assembly with the passivation layer substantially inhibiting diffusion of oxygen from the oxide layer during the thermal treatment of the substrate assembly. Generally, the passivation layer comprises SixOyNz.

Abstract: A method of forming a silicide layer in contact with a silicon substrate. The method comprises forming the silicide layer by supplying a silicon-containing source that is different from the silicon substrate, such that the silicon in the silicide layer originates primarily from the silicon-containing source.

Abstract: A method for vacuum packaging MEMS or similar devices during device fabrication comprises forming a plurality of MEMS devices (12), or similar devices, on a device wafer (10). A device sealing ring (16) is formed between the MEMS devices (12) and bonding pads (14) connected to a MEMS device. A solder adhesion layer (24) forms part of the device sealing ring (16) surrounding each MEMS or similar device (12). A lid wafer (30) is formed having a plurality of lid sealing rings (32) corresponding in number and location to the device sealing rings (16). Each lid sealing ring (32) surrounds a cavity (34). The device wafer (30) is aligned with the lid wafer (10) to align each device sealing ring (16) with the corresponding lid sealing ring (32), leaving a gap between the lid wafer (30) and the device wafer (10). The resulting assembly (50) is placed in a vacuum furnace.

Abstract: A multi-level shelf degas station relying on at least two heaters integrated within wafer holding shelves or slots, where the semiconductor wafers do not have direct contact with the heater shelves. The heaters provide conduction heating. In order to degas a wafer, the heater and wafer holder assembly is positioned in a sequential manner through each wafer slot to the next available slot. If a degassed wafer exists in the slot, a transfer chamber arm removes it. A loader arm then places a wafer in the available, empty slot and the stage is moved upwards to receive the wafer from the loader arm. The transfer chamber arm removes an individual wafer from the heater and wafer holder assembly allowing the removed wafer to be individually processed while the other wafers remain in the heater and wafer holder assembly. In some instances, a loader arm may also remove wafers.

Abstract: A target semiconductor device can be obtained stably by reforming an insulating film and a semiconductor. In a process of manufacturing a semiconductor device, at least one of the semiconductor and the insulating film is reformed after an annealing process for annealing the semiconductor at a temperature ranging from 20 to 400° C. in the atmosphere containing a gas of water (H2O) with a partial pressure from 1 Torr to a saturated vapor pressure for an annealing time ranging from 15 seconds to 20 hours.

Abstract: A semiconductor device fabrication apparatus includes a thermal treatment device for thermally processing a semiconductor substrate, a first oxygen monitor for monitoring the density of oxygen in said thermal treatment device, a load-lock chamber separably coupled to said thermal treatment device for housing the semiconductor substrate before thermal treatment thereof by said thermal treatment device, and a second oxygen monitor for monitoring the density of oxygen in said load-lock chamber. First, the semiconductor substrate is introduced into the load-lock chamber, and then the load-lock chamber is evacuated. Thereafter, the density of oxygen in the load-lock chamber is measured by the second oxygen monitor, and the thermal treatment device is evacuated, after which the density of oxygen in the thermal treatment device is measured by the first oxygen monitor.

Abstract: There is provided a semiconductor device having a silicon oxynitride passivation layer and a fabrication method thereof. The passivation layer is formed of a silicon oxynitride having a dielectric constant of 5.0-6.0 and an atomic composition ratio of silicon (25-40%), oxygen (25-40%), and nitrogen (25-40%). Therefore, the passivation layer has a low dielectric constant and is highly moisture-resistant to thereby reduce the parasitic capacitance between metal wiring layers.

Abstract: A method for producing a plasma silicon nitride series film with a small heat load having a low hydrogen concentration is provided. The method is for producing a silicon nitride series film on a material to be treated using a plasma CVD apparatus having a reaction chamber evacuated to vacuum. The method comprises the steps of introducing a monosilane gas (SiH4) and a nitrogen gas (N2) as raw material gases into the reaction chamber at prescribed flow rates, and heating the material to be treated to a prescribed temperature. At this time, it is characterized in that the flow rate of the nitrogen gas is at least 100 times the flow rate of the monosilane gas.

Abstract: In a film structure comprising a ferroelectric thin film formed on a substrate, the ferroelectric thin film contains a rare earth element (Rn), Pb, Ti, and O in an atomic ratio in the range: 0.8≦(Pb+Rn)/Ti≦1.3 and 0.5≦Pb/(Pb+Rn)≦0.99, has a perovskite type crystal structure, and is of (001) unidirectional orientation or a mixture of (001) orientation and (100) orientation. The ferroelectric thin film can be formed on a silicon (100) substrate, typically by evaporating lead oxide and TiOx in a vacuum chamber while introducing an oxidizing gas therein.

Abstract: A contact layer is used, for example, as a liner for the fabrication of electrical contacts in contact holes. The contact layer is fabricated in two steps, in a first step a first contact layer is deposited, in which only a small proportion of the particles to be sputtered is ionized. In a second sputtering step, a second contact layer is sputtered, in the course of whose fabrication a larger proportion of the particles to be sputtered is ionized. The procedure ensures that the first contact layer is disposed as a protective layer on the substrate by gentle sputtering before the second contact layer is sputtered.

Abstract: A semiconductor manufacturing apparatus for executing an exposure process upon filling a chamber, an illuminating optics unit and a projection optics unit with an inert gas is provided with a supply unit that supplies clean, dry air for raising the concentration of oxygen in a maintenance area, and with a sensor for sensing oxygen concentration or ozone concentration in the maintenance area. When maintenance is carried out, the supply unit is actuated to raise the oxygen concentration in the maintenance area, thereby assuring the safety of workers. A maintenance cover is provided with a door switch for sensing that the cover has been opened. Actuation of the supply unit is started in accordance with the state sensed by the door switch. Alternatively, the supply unit is actuated on the basis of an input ordering the start of a maintenance operation.

Abstract: Systems and methods of achieving optimal light transmittance through a gas and light transmittance region. This invention is directed at the application of specific activated carbon based materials for the protection of imaging lenses which are targeting optimal transmittance at specific wavelengths. Specifically, it outlines a use of a specific type of carbon to obtain improved/constant transmittance at a specific wavelength or range of wavelengths. In addition, it also presents the use of a mixture of activated carbon types in order to obtain improved/constant transmissions over a broad range of wavelengths.

Abstract: A semiconductor processing apparatus includes a load chamber, an unload chamber, a common transfer chamber, a first process chamber, and a second process chamber, which are connected via gate valves. The load and unload chambers are connected to a first vacuum-exhaust mechanism including a common dry pump. The common transfer chamber is connected to a second vacuum-exhaust mechanism including a dry pump. The first and second processes chambers are connected to a third vacuum-exhaust mechanism including a common dry pump, and first and second turbo molecular pumps. The processing apparatus includes a controller which can drive and stop the dry pumps independently of each other in coordination with open/closed switching of the gate valves, while keeping the turbo molecular pumps driven.

Abstract: A silicon substrate on which a silicon dioxide film having a groove is formed is placed on a sample stage disposed in a vacuum chamber. Subsequently, a titanium film and a tungsten film are deposited sequentially on the silicon dioxide film. The surface of the tungsten film is nitrided by using a plasma under the pressure maintained at 10 Pa or higher inside the vacuum chamber, so as to form a tungsten nitride film. After a copper film is deposited on the tungsten nitride film, the portions of the titanium film, tungsten film, tungsten nitride film, and copper film located outside the groove are removed, thus forming a buried interconnecting wire made of copper.

Abstract: In a method for manufacturing semiconductor light emitting device, when a gallium nitride based compound semiconductor layers which include at least an n-type layer and p-type layer and which form a light emitting layer, are laminated on a substrate and heat treatment is performed for activation of the p-type layer of the laminated semiconductor layers, the heat treatment is performed under an atmosphere including oxygen. With this arrangement, the heat treatment for activating the p-type layer of the laminated semiconductor layers comprising gallium nitride based compound semiconductor can be performed in a short time and moreover to reliably perform activation.

Abstract: A semiconductor manufacturing system includes a getter-based gas purifier coupled in flow communication with a gas distribution network for a semiconductor fabrication facility. The gas distribution network supplies purified gas to at least one wafer processing chamber in the semiconductor fabrication facility. The gas purifier includes a getter column having a metallic vessel with an inlet, an outlet, and a containment wall extending between the inlet and the outlet. Getter material which purifies gas flowing therethrough by sorbing impurities therefrom is disposed in the vessel. A first temperature sensor is disposed in a top portion of the getter material. The first temperature sensor is located in a melt zone to detect rapidly the onset of an exothermic reaction which indicates the presence of excess impurities in the incoming gas to be purified. A second temperature sensor is disposed in a bottom portion of the getter material.

Abstract: The present invention provides a method of manufacturing a semiconductor device, comprising the steps of forming a gate insulating film, on a semiconductor substrate, forming a gate electrode containing a refractory metal layer on the gate insulation film, and heat-processing the semiconductor substrate in an atmosphere containing water vapor and hydrogen, to lessen a damage caused to a portion of the semiconductor substrate, which is located close to an end portion of the gate electrode. The heat-processing step is carried out while controlling a vapor pressure of a refractory metal oxo-acid generated on a surface of the high-melting metal layer.

Abstract: An apparatus and method for reducing particles in reactors. The apparatus includes an enclosure with a wafer handling chamber connected by an isolation gate valve to a processing chamber. Pipes deliver purge gas into the wafer handling chamber to eliminate particles from the enclosure. A pilot operated back pressure regulator regulates the delivery and removal of the purge gas. The apparatus actuates the isolation gate valve in a controlled rate to reduce disturbances from the purge gas entering into the enclosure. A Bernoulli wand is provided for lifting and holding a single semiconductor wafer. A dome loaded regulator actuated by a pilot gas is used to control the ramp rates of gas to the Bernoulli wand. The ramping rates of the Bernoulli wand gas can be controlled by restrictions and check valves in the pilot gas line. The apparatus also utilizes ionizers in the purge gas lines entering the wafer handling chamber and load locks.

Abstract: A cost-effective method for fabricating MIM capacitors (120). After metal (106) deposition, the metal oxide (108) is formed using an oxidation chemistry that includes CO2 and H2. The CO2/H2 gas ratio is controlled for selective oxidation. Thus, the metal (106) is effectively protected from oxidation due to the existence of both H2 and CO2 as strong reduction reagent.

Abstract: In a method for manufacturing a semiconductor device, a first insulating layer is formed on a semiconductor substrate, and a gate electrode is formed on the first insulating layer. Then, a second insulating layer is formed over the gate electrode. The second insulating layer has a high ability to stop the diffusion of hydrogen atoms therethrough. Then, hydrogen passivation is performed upon an interface between the semiconductor substrate and the first insulating layer at a first temperature. Then, a metal wiring layer is formed over the insulating layer, and the metal wiring layer is heated at a second temperature lower than the first temperature.

Abstract: According to one embodiment of the invention, a high pressure anneal is utilized to form titanium silicide at the bottom of a contact hole, at a pressure of at least approximately 1.1 atmospheres, from a reaction between deposited titanium and underlying silicon. When such high pressures are used, temperatures of less than approximately 700 degrees Celsius are utilized. According to another embodiment of the invention, a conductive plug fill material is deposited within a contact hole such that the plug structure is relatively free of voids. Either during deposition of the conductive plug fill material or after such deposition, the conductive plug fill material is subjected to a high pressure force-fill, at a pressure of at least approximately 1.1 atmospheres. When such high pressures are used, temperatures of less than approximately 700 degrees Celsius are utilized for the force-fill. Aluminum can be used for the conductive plug fill material when using this embodiment of the invention.

Abstract: The present invention discloses a method for planarizing a semiconductor device used in an integrated circuit. According to the method, a semiconductor substrate on which a patterned layer having topology is formed, is loaded into a reactor chamber. Afterwards, an interlevel insulating layer is formed on the semiconductor substrate. Thereafter, a layer for the planarization containing a dopant is formed on the interlevel insulating layer. The dopant contained in the layer for the planarization, is diffused outwards from the surface of the layer. The dopant diffused outwards from the layer for the planarization is pumped out to the outside of the reactor chamber without introducing an inert gas to the reactor chamber. Finally, the layer for the planarization is flowed.

Abstract: An apparatus and method for forming thin film aerogels on semiconductor substrates is disclosed. It has been found that in order to produce defect-free nanoporous dielectrics with a controllable high porosity, it is preferable to substantially limit evaporation and condensation of pore fluid in the wet gel thin film, e.g. during gelation, during aging, and at other points prior to obtaining a dried gel. The present invention simplifies the atmospheric control needed to prevent evaporation and condensation by restricting the atmosphere in contact with the wet gel thin film to an extremely small volume. In one embodiment, a substrate 26 is held between a substrate holder 36 and a parallel plate 22, such that a substantially sealed chamber 32 exists between substrate surface 28 and chamber surface 30. Preferably, the average clearance between surfaces 28 and 30 is less than 5 mm, or more preferably, less than 1 mm. Temperature control means 34 may optionally be used to control the temperature in chamber 32.

Abstract: The trap apparatus of the present invention includes a case provided for a gas exhaust system used for a film forming equipment which carries out a film forming process on an object, a gas supply port, made in the case and connected to an exhaust pipe of the gas exhaust system, for introducing an exhaust gas flowing through the exhaust pipe, into the case, a gas exhaust port, made in the case and connected to an exhaust pipe of the gas exhaust system, for exhausting the exhaust gas flowing through an inner space of the case, to the exhaust pipe, a plurality of partition plates arranged in the case so as to partition the inner space of the case into a plurality of rooms between the gas supply port and the gas exhaust port, a gas distribution port provided in some of the partition plates such that the exhaust gas introduced into the case through the gas supply port, is allowed to flow through the rooms partitioned by the partition plates, in the order, and then exhausted from the gas exhaust port, a trap mechan

Abstract: In manufacturing a thin-film transistor on a glass substrate, a first thin film consisting of an amorphous silicon thin film is formed on the glass substrate, and a second thin film is formed on the first thin film. Then, this second thin film is etched to form a mask pattern. A dopant ion is doped into the first thin film through the mask pattern to form a source region and a drain region. The process of forming the mask pattern and the process of forming the source and drain regions are carried out continuously without exposing the substrate to the atmosphere.

Abstract: Gaseous reactants capable of depositing a thin film on a semiconductor substrate are introduced into a deposition zone of a deposition apparatus through a gaseous reactants dispersion apparatus having rounded corners and smoothed anodized surfaces and maintained at a temperature ranging from about 70.degree. C. to about 85.degree. C., and preferably from about 75.degree. C. to about 80.degree. C., to inhibit the deposition and accumulation on such surfaces of charged materials capable of generating particles which may cause damage to the semiconductor substrate.

Abstract: A method of reducing particle deposition during the fabrication of microelectronic circuitry is presented. Reduction of particle deposition is accomplished by controlling the relative temperatures of various parts of the deposition system so that a large temperature gradient near the surface on which fabrication is taking place exists. This temperature gradient acts to repel particles from that surface, thereby producing cleaner surfaces, and thus obtaining higher yields from a given microelectronic fabrication process.

Abstract: A semiconductor device includes a semiconductor substrate having a trench on a surface thereof and an embedding member embedding the interior of the trench therewith. While the section of the trench when cut by a first plane perpendicular to the direction of the depth of the trench is defined as a first section and the section of the trench when cut by a second plane perpendicular to the direction of the depth of the trench and closer to the bottom of the trench than the first plane is defined as a second section, the area of the first section is smaller than that of the second section and a minimum radius of curvature of the first section is smaller than a minimum radius of curvature of the second section. As a result, it is possible to lessen the concentration of the electric field into the bottom of the trench.

Abstract: An apparatus for low pressure chemical vapor deposition for fabricating a semiconductor device comprises a group of reaction chambers, a group of high-vacuum pumps connected to the reaction chambers, a group of gate valves connected to the high-vacuum pumps, and a low-vacuum pump connected to the gate valves. There are fewer gate valves than high-vacuum pumps. A method for fabricating a semiconductor device using the above apparatus includes the sequence and duration of opening gate valves, injecting reaction gases, and pumping with the low vacuum pump. According to the present invention, since the number of pumps is reduced, the cost for installation, operation and maintenance of the semiconductor device fabrication apparatus is reduced.

Abstract: An apparatus and method for forming thin film aerogels on semiconductor substrates is disclosed. It has been found that in order to produce defect.about.free nanoporous dielectrics with a controllable high porosity, it is preferable to substantially limit evaporation and condensation of pore fluid in the wet gel thin film, e.g. during gelation, during aging, and at other points prior to obtaining a dried gel. The present invention simplifies the atmospheric control needed to prevent evaporation and condensation by restricting the atmosphere in contact with the wet gel thin film to an extremely small volume. In one embodiment, a substrate 26 is held between a substrate holder 36 and a parallel plate 22, such that a substantially sealed chamber 32 exists between substrate surface 28 and chamber surface 30. Preferably, the average clearance between surfaces 28 and 30 is less than 5 mm, or more preferably, less than 1 mm.

Abstract: A novel batch processing system used, for example, in plasma etching and chemical vapor deposition, wherein the pressure in the reactor is cycled through a varying pressure to increase the transfer of the reactant materials to the center of the wafer. One version of the invention provides a method that includes the steps of (i) feeding reactant gases into a reaction vessel, (ii) exhausting unused reactive gases and/or reaction by-products from the reaction vessel, and (iii) cycling the pressure in the reaction vessel between a higher pressure P.sub.high and a lower pressure P.sub.low. Another version of the invention provides an apparatus that comprises (i) a reaction vessel, (ii) a feed means for feeding reactive gases into the reaction vessel, (iii) an exhaust means for exhausting unused reactive gases and/or reaction by-products from the reaction vessel, and (d) a pressure control means for cycling the pressure in the reaction vessel between a higher pressure P.sub.high and a lower pressure P.sub.low.

Abstract: Silicon oxide films which are good as gate insulation films are formed by subjecting a silicon oxide film which has been formed on an active layer comprising a silicon film by means of a PVD method or CVD method to a heat treatment at 300-700.degree. C. in a dinitrogen monoxide atmosphere, or in an NH.sub.3 or N.sub.2 H.sub.4 atmosphere, while irradiating with ultraviolet light, reducing the hydrogen and carbon contents in the silicon oxide film and introducing nitrogen into the boundary with the silicon film in particular. Furthermore, silicon oxide films which are good as gate insulating films have been formed by subjecting silicon oxide films which have been formed on an active layer comprising a silicon film by means of a PVD method or CVD method to a heat treatment at 300-700.degree. C. in an N.sub.2 O atmosphere (or hydrogen nitride atmosphere) while irradiating with ultraviolet light, and then carrying out a heat treatment at 300-700.degree. C. in a hydrogen nitride atmosphere (N.sub.

Abstract: A method for forming a titanium nitride layer within an integrated circuit. There is first provided a substrate. There is then formed over the substrate a virgin titanium nitride layer, where the virgin titanium nitride layer is formed through a chemical vapor deposition (CVD) method employing a tetrakis-diallylamido titanium source material without a halogen activator source material. The virgin titanium nitride layer is then annealed in a first plasma comprising nitrogen and hydrogen to form a refined titanium nitride layer. The refined titanium nitride layer is then annealed in a second plasma comprising nitrogen without hydrogen. Through the method there is formed a titanium nitride layer with superior step coverage, low resistivity and low impurities concentration.

Abstract: There is herein disclosed a self-align-silicide formation technique which can be applied to miniaturized semiconductor elements. Heat treatment steps for silicidation of a high-melting metal film are two steps of a first heat treatment under an atmosphere containing no nitrogen and a second heat treatment under an atmosphere containing nitrogen. The first heat treatment is carried out under the atmosphere containing no nitrogen, whereby the nitriding of titanium can be restrained. In consequence, the thin silicide film can be formed in a self align state.

Abstract: An object of the invention is to provide a method for the heat treatment of II-VI semiconductors such as ZnS, ZnS.sub.x Se.sub.1-x, Zn.sub.y Cd.sub.1-y Se, etc. to dope with Group III elements as a donor impurity to reduce its resistivity. This object can be attained by a method for the heat treatment of II-VI semiconductors in a closed vessel, which comprises forming a film of a Group III element as a donor impurity or a Group III element-containing compound on a surface of single crystal of II-VI semiconductors, then charging the single crystal and a Group II element for constituting the single crystal in the closed vessel and heating them in such a manner that the both are not contacted with each other.

Abstract: A method for the scrubbing of noxious substances from an exhaust gas stream from an evacuated process chamber containing a tool for the processing of semiconductor devices. The method comprises directing the stream from the chamber in to a duct containing a multi-way valve and selectively adjusting the valve to cause different fractions of the stream to be directed to relevant treatment/collection/exhaust points.

Abstract: A method of reducing stress on a substrate in a thermal processing chamber. The method includes the steps of supporting a first portion of a substrate by means of contacting the same such that a second portion of the substrate is not contacted, part of the second portion forming one wall of a cavity, and flowing a gas into the cavity such that the pressure of the gas exerts a force on the second portion to at least partially support the second portion.

Abstract: A method of reducing metal contamination during semiconductor processing in a reactor having metal components is provided. The method includes forming an aluminum oxide layer on the surface of certain of the metal components before processing of substrates. The aluminum oxide layer substantially prevents the formation of volatile metal atoms from the metal components. The aluminum oxide layer is formed by heating the metal component first in a dry N.sub.2 atmosphere to a first temperature, and then in a dry H.sub.2 atmosphere to a second temperature. The component is then soaked at the second temperature in a wet H.sub.2 atmosphere to form the aluminum oxide layer, and is followed by soaking at the second temperature in a dry H.sub.2 atmosphere to reduce any other metal oxides that may have formed. The component is then cooled first in a dry H.sub.2 atmosphere, and then in a dry N.sub.2 atmosphere where a layer of substantially pure aluminum oxide is provided on the surface of the metal component.

Abstract: The trap apparatus of the present invention includes a case provided for a gas exhaust system used for a film forming equipment which carries out a film forming process on an object, a gas supply port, made in the case and connected to an exhaust pipe of the gas exhaust system, for introducing an exhaust gas flowing through the exhaust pipe, into the case, a gas exhaust port, made in the case and connected to an exhaust pipe of the gas exhaust system, for exhausting the exhaust gas flowing through an inner space of the case, to the exhaust pipe, a plurality of partition plates arranged in the case so as to partition the inner space of the case into a plurality of rooms between the gas supply port and the gas exhaust port, a gas distribution port provided in some of the partition plates such that the exhaust gas introduced into the case through the gas supply port, is allowed to flow through the rooms partitioned by the partition plates, in the order, and then exhausted from the gas exhaust port, and a trap me

Abstract: An exhaust system for a semiconductor etcher that utilizes corrosive gas. Specifically, the present invention exhausts residual corrosive gas from the exit load lock compartment of a semiconductor etcher. For instance, at the completion of the etching process of semiconductor wafers, the exit load lock compartment of an etcher contains the etched wafers along with residual corrosive gas. When the exit load lock compartment pressure returns to about 1 atmosphere, the residual corrosive gas begins to escape. Within an embodiment of the present invention, an exhaust box is adjacently located to the exit load lock compartment to exhaust the residual corrosive gas from it. The exhaust box is a specifically shaped hollow box that has an intake slot and an exhaust aperture. Two edges that partly form the intake slot are parallel to the outer side edge of the exit load lock compartment when its door is open. The intake slot length matches the outer side edge length of the exit load lock compartment.

Abstract: This ion implantation method reduces the observed levels of cross-contamination and reduces the level of variations in surface conductivity related to the provision of multiple ion implantations into a semiconductor wafer. Reduced levels of cross-contamination are obtained by purging the implantation chamber and then evacuating the implantation chamber before beginning an implantation process. This purge and evacuation cycle is believed to be particularly effective in reducing cross-contamination when two implantations are made consecutively into a wafer without removing the wafer from the implantation chamber or when successive wafers are transported into the ion implantation chamber and implantations are made into each successive wafer.

Abstract: The present invention discloses a method for coating a polyimide precursor on an electronic structure incorporating the use of a silicon coupling agent without any bubble defect in the film deposited. The method can be carried out by flowing at least one inert gas through a deposition chamber and thereby keeping the relative humidity in the chamber at below 25% to carry away the formation of any water molecules and water vapor to prevent the formation of bubbles in the film deposited.

Abstract: A method of fabricating an integrated circuit device with a substantially uniform inter-layer dielectric layer. The method includes steps of providing a partially completed semiconductor wafer (400) where the partially completed semiconductor device has a first polysilicon layer (401) thereon. The method includes depositing a dielectric layer (405) overlying the polysilicon layer and portions of the partially completed semiconductor device at a pressure of about 1 atmosphere. A step of forming a second polysilicon layer overlying portions of the dielectric layer is also included. The dielectric layer depositing step includes combining an organic silane and an ozone at a concentration of 200 g/m.sup.3 and less.

Abstract: The present invention provides a method of forming a contact structure comprised of a silicon substrate, a titanium silicide layer, a barrier layer (i.e., TiN or TiNO), and a metal layer (e.g., Al or W). There are three embodiments of the invention for forming the titanium silicide layer and two embodiments for forming the barrier layer (TiN or TiNO). The first embodiment for forming a TiSix layer comprises three selective deposition steps with varying TiCl4:SiH4 ratios. After the TiSix contact layer is formed a barrier layer and a metal plug layer are formed thereover to form a contact structure. The method comprises forming a barrier layer 140 over the silicide contact layer 126; and forming a metal plug 160 over the TiN barrier layer 140. The metal plug 160 is composed of Al or W.

Abstract: A method of manufacturing a semiconductor device includes the steps of: patterning a first passivation film on a semiconductor substrate; patterning a ball limiting metal film; patterning a second passivation film; performing a heat-treatment for hardening the second passivation film and annealing the ball limiting metal film; patterning a bump forming metal film; and wet-back processing the bump forming metal film. In this method, the heat-treatment may be performed in an atmosphere having an oxygen concentration of 50 ppm or less at a temperature of from 300.degree. to 400.degree. C. for 10 to 30 minutes. Additionally, at least one of the first and second passivation films may be a polyimide film, and the ball limiting metal film may has a three layer structure of a Ti layer, a Cu layer and an Au layer laminated from the bottom in this order.