Abstract: Examples are disclosed that relate to time-of-flight camera systems comprising vertical photogates. One example provides a time-of-flight camera comprising a plurality of addressable pixels configured for backside illumination, each addressable pixel comprising a first vertical photogate and a second vertical photogate. The time-of-flight camera further comprises a processor and a storage device storing instructions executable on the processor to, during an integration period, apply a first relative bias to the first vertical photogate and the second vertical photogate to collect charge at a first pixel tap, apply a second relative bias to the first vertical photogate and the second vertical photogate to collect charge at a second pixel tap, and determine a distance value for the addressable pixel based at least upon the charge collected at the first pixel tap and the charge collected at the second pixel tap.

Abstract: A light-receiving device of an embodiment of the present disclosure includes a photoelectric conversion layer that includes a first compound semiconductor with a first conductivity type and absorbs a wavelength of an infrared region, a first semiconductor layer formed on the photoelectric conversion layer, and an insulation layer formed to surround the photoelectric conversion layer and the first semiconductor layer, the first semiconductor layer having a second conductivity-type region at a middle region excluding a periphery facing the photoelectric conversion layer.

Abstract: A substrate has a front side including an electrical circuit and a rear side including an exposed zone that faces the electrical circuit. In an electrochemical treatment step, an electrical potential is laterally applied at least to the exposed zone of the rear side of the substrate, while the exposed zone is in contact with a chemically reactive substance. The electrical potential causes a lateral flow of electrical current at least in the exposed zone of the substrate. The lateral flow of current and the chemically reactive substance alter the substrate in at least the exposed zone.

Abstract: A method of correcting defects appearing in an image produced by an image sensor, the method comprising: receiving an image to be corrected, taken by the image sensor, receiving a temperature from the image sensor, acquired when the image to be corrected is taken by the image sensor, receiving an integration time applied by the image sensor when taking the image to be corrected, and for each pixel of the image to be corrected, subtracting from the pixel value a pixel-specific noise correction factor derived from a noise reduction model comprising a linear component dependent on the temperature of the image sensor, added to an exponential component depending on the temperature of the image sensor and multiplied by the integration time, the linear and exponential components depending on coefficients specific to the pixel.

Abstract: The present technology relates to a solid-state imaging apparatus and electronic equipment capable of coping with fluctuations in characteristics depending on the direction of current flow. There is provided a solid-state imaging apparatus including: a pixel array unit that includes pixels having a photoelectric conversion unit and arranged in a two-dimensional form, in which a transistor of the pixel has a structure in which an amount of overlap to an underside of a gate by a source-side LDD region differs from an amount of overlap to the underside of the gate by a drain-side LDD region, and a junction depth of the source-side LDD region differs from a junction depth of the drain-side LDD region. The present technology may be applied, for example, to a CMOS image sensor.

Abstract: An image sensor includes a semiconductor substrate including a first surface and a second surface and further includes a well region and a first floating diffusion region that are each adjacent to the first surface. The image sensor includes a first vertical transmission gate and a second vertical transmission gate isolated from direct contact with each other and each extend from the first surface of the semiconductor substrate and in a thickness direction of the semiconductor substrate through at least a portion of the well region. The image sensor includes a first storage gate between the first vertical transmission gate and the first floating diffusion region and on the first surface of the semiconductor substrate. The image sensor includes a first tap transmission gate between the first storage gate and the first floating diffusion region and on the first surface of the semiconductor substrate.

Abstract: The photodetector is formed in a silicon carbide body formed by a first epitaxial layer of an N type and a second epitaxial layer of a P type. The first and second epitaxial layers are arranged on each other and form a body surface including a projecting portion, a sloped lateral portion, and an edge portion. An insulating edge region extends over the sloped lateral portion and the edge portion. An anode region is formed by the second epitaxial layer and is delimited by the projecting portion and by the sloped lateral portion. The first epitaxial layer forms a cathode region underneath the anode region. A buried region of an N type, with a higher doping level than the first epitaxial layer, extends between the anode and cathode regions, underneath the projecting portion, at a distance from the sloped lateral portion as well as from the edge region.

Abstract: Example embodiments relate to an image sensor configured to achieve a high photoelectric conversion efficiency and a low dark current. The image sensor includes first and second electrodes, a plurality of photodetection layers provided between the first and second electrodes, and an interlayer provided between the photodetection layers. The photodetection layers convert incident light into an electrical signal and include a semiconductor material. The interlayer includes a metallic or semi metallic material having anisotropy in electrical conductivity.

Abstract: A solid-state imaging device with high productivity and improved dynamic range is provided. In the imaging device including a photoelectric conversion element having an i-type semiconductor layer, functional elements, and a wiring, an area where the functional elements and the wiring overlap with the i-type semiconductor in a plane view is preferably less than or equal to 35%, further preferably less than or equal to 15%, and still further preferably less than or equal to 10% of the area of the i-type semiconductor in a plane view. Plural photoelectric conversion elements are provided in the same semiconductor layer, whereby a process for separating the respective photoelectric conversion elements can be reduced. The respective i-type semiconductor layers in the plural photoelectric conversion elements are separated by a p-type semiconductor layer or an n-type semiconductor layer.

Abstract: A photodetecting device includes a semiconductor photodetecting element including a plurality of pixels distributed two-dimensionally and a mount substrate including a plurality of signal processing units arranged to process output signals from the corresponding pixels. The semiconductor photodetecting element includes, for each of the pixels, a plurality of avalanche photodiodes arranged to operate in Geiger mode, a plurality of quenching resistors each electrically connected in series with a respective avalanche photodiodes, and a through-electrode electrically connected to the plurality of quenching resistors. Each of the signal processing units includes a current mirror circuit electrically connected to the plurality of avalanche photodiodes via the corresponding through-electrode and arranged to output a signal corresponding to output signals from the plurality of avalanche photodiodes.

Abstract: A solid state imaging device including: a pixel region that is formed on a light incidence side of a substrate and to which a plurality of pixels that include photoelectric conversion units is arranged; a peripheral circuit unit that is formed in a lower portion in the substrate depth direction of the pixel region and that includes an active element; and a light shielding member that is formed between the pixel region and the peripheral circuit unit and that shields the incidence of light, emitted from an active element, to the photoelectric conversion unit.

Abstract: A solid-state imaging device with high productivity and improved dynamic range is provided. In the imaging device including a photoelectric conversion element having an i-type semiconductor layer, functional elements, and a wiring, an area where the functional elements and the wiring overlap with the i-type semiconductor in a plane view is preferably less than or equal to 35%, further preferably less than or equal to 15%, and still further preferably less than or equal to 10% of the area of the i-type semiconductor in a plane view. Plural photoelectric conversion elements are provided in the same semiconductor layer, whereby a process for separating the respective photoelectric conversion elements can be reduced. The respective i-type semiconductor layers in the plural photoelectric conversion elements are separated by a p-type semiconductor layer or an n-type semiconductor layer.

Abstract: A semiconductor device includes a device layer, a semiconductor layer, a sensor element, a dielectric layer, a color filter layer, and a micro-lens. The semiconductor layer is over the device layer. The semiconductor layer has a plurality of microstructures thereon. Each of the microstructures has a substantially triangular cross-section. The sensor element is under the microstructures of the semiconductor layer and is configured to sense incident light. The dielectric layer is over the microstructures of the semiconductor layer. The color filter layer is over the dielectric layer. The micro-lens is over the color filter layer.

Abstract: A sensor arrangement to sense an external signal comprises a sensor (100) and a charge generator (200) to generate a compensation current (Ic) to compensate the sensor current. A charge generator (200) comprises a first transistor (210) having a parasitic capacitor (212) and a first conductive path. The charge generator (200) comprises a second transistor (220) having a second conductive path being coupled in series to the first transistor (210) and coupled to the output node (O200) of the charge generator (200). The control circuit (600) is configured to control the conductivity of the respective first and second conductive path of the first and the second transistor (210, 220) of the charge generator (200) so that the sensor current is compensated by the compensation current (Ic).

Abstract: A photodiode according to example embodiments includes an anode, a cathode, and an intrinsic layer between the anode and the cathode. The intrinsic layer includes a P-type semiconductor and an N-type semiconductor, and composition ratios of the P-type semiconductor and the N-type semiconductor vary within the intrinsic layer depending on a distance of the intrinsic layer from one of the anode and the cathode.

Abstract: An image sensor includes a semiconductor substrate providing a plurality of pixel regions, a semiconductor photoelectric device disposed in each of the plurality of pixel regions, an organic photoelectric device disposed above the semiconductor photoelectric device, and a pixel circuit disposed below the semiconductor photoelectric device. The pixel circuit includes a plurality of driving transistors configured to generate a pixel voltage signal from an electric charge generated in the semiconductor photoelectric device and the organic photoelectric device. A driving gate electrode of at least one of the plurality of driving transistors has a region embedded in the semiconductor substrate.

Abstract: A display device includes a first amplifier and second data amplifier connected to a first data line and second data line, to a first high voltage power source and second high voltage power source and to a first low voltage power source and second low voltage power source, respectively, a first pixel and second pixel each having a data input terminal connected to the first data line and second data line, respectively. The first high voltage power source and the first low voltage power source determine an upper limit and a lower limit of an output voltage of the first amplifier, respectively, the second high voltage power source and the second low voltage power source determine an upper limit and a lower limit of an output voltage of the second amplifier, respectively, and the first low voltage power source and second low voltage power source are independent power sources.

Abstract: A semiconductor die can include: first, second, third, and fourth transistors disposed at intervals, where each two of the first, second, third, and fourth transistors are separated by a separation region to form four separation regions; an isolation structure having a first doping structure of a first doping type, and a second doping structure of a second doping type, to absorb hole carriers and electron carriers flowing between the first, second, third, and fourth transistors; where the first doping structure is located in the separation region to isolate adjacent transistors in the first, second, third, and fourth transistors; and where at least a portion of the second doping structure is surrounded by the first doping structure, and the second doping structure is separated from the first doping structure.

Abstract: An optical module includes a substrate that has a first surface and a second surface opposite to the first surface and provided with a first hole portion having an opening surface on at least the first surface, an optical element that is provided on the substrate, the optical element having an optical axis located along a thickness direction from the first surface toward the second surface and located in the first hole portion, and a first light shielding portion that is provided on an inner peripheral surface which intersects the opening surface of the first hole portion and has a higher light shielding property than the substrate.

Abstract: A layered semiconductor structure with a width in a lateral direction, having an operating area covering part of the width of the semiconductor structure, comprises a semiconductor substrate with majority charge carriers of a first polarity; and a first dielectric layer with inducing net charge of the first polarity on the semiconductor substrate. An induced junction is induced in the semiconductor substrate by an electric field generated in the semiconductor substrate by the inducing net charge. The semiconductor structure is configured to confine the electric field generated in the semiconductor substrate in the operating area.

Abstract: A display panel of the present disclosure includes a substrate layer, a light emitting layer and a plurality of photosensitive elements, the light emitting layer includes a plurality of pixel units, the photosensitive elements are formed between the pixel units, the photosensitive elements are configured to sensing light reflected by the fingers and emitted by the pixel units for fingerprint identification, when the finger attaches to the display panel, the light emitted by the light emitting layer and reflected by the fingers reaches the photosensitive elements, the photosensitive elements receive the light for fingerprint identification.

Abstract: Gated MIS tunnel diode devices having a controllable negative transconductance behavior are provided. In some embodiments, a device includes a substrate, a tunnel diode dielectric layer on a surface of the substrate, and a gate dielectric layer on the surface of the substrate and adjacent to the tunnel diode dielectric layer. A tunnel diode electrode is disposed on the tunnel diode dielectric layer, and a gate electrode is disposed on the gate dielectric layer. A substrate electrode is disposed on the surface of the substrate, and the tunnel diode electrode is positioned between the gate electrode and the substrate electrode.

Abstract: A semiconductor wafer forms on a mold containing a dopant. The dopant dopes a melt region adjacent the mold. There, dopant concentration is higher than in the melt bulk. A wafer starts solidifying. Dopant diffuses poorly in solid semiconductor. After a wafer starts solidifying, dopant can not enter the melt. Afterwards, the concentration of dopant in the melt adjacent the wafer surface is less than what was present where the wafer began to form. New wafer regions grow from a melt region whose dopant concentration lessens over time. This establishes a dopant gradient in the wafer, with higher concentration adjacent the mold. The gradient can be tailored. A gradient gives rise to a field that can function as a drift or back surface field. Solar collectors can have open grid conductors and better optical reflectors on the back surface, made possible by the intrinsic back surface field.

Abstract: The present application provides a live broadcast processing method, an apparatus, a device, and a storage medium thereof, where the method includes: receiving, by a live broadcast server, source media data sent by a first terminal device of a video live broadcast side, where the source media data includes video data and audio data; translating the audio data into audio data in at least one target language; acquiring a playing language required by a video playing side, and acquiring audio data corresponding to the playing language from the audio data in the at least one target language; merging the audio data corresponding to the playing language with the video data to obtain target media data; and transmitting the target media data to a second terminal device of the video playing side for playback.

Abstract: A photodetector is provided with a metal-semiconductor junction for measuring infrared radiation. In another embodiment, the photodetector includes structures to achieve localized surface plasmon resonance at the metal-semiconductor junction stimulated by incident light. The photodetector hence has prompted response and broadband spectra region for photon detection. The photodetector can be used for detecting varied powers of incident light with wavelength from visible to mid-infrared region (300 nm˜20 ?m).

Abstract: One general aspect includes a method to receive and deliver media content during a designated time slot, the method including: receiving, via a processor, a first type of media content over a first wireless communication channel; detecting, via the processor, the designated time slot in the first type of media content; receiving, via the processor, a second type of media content over a second wireless communication channel when in proximity of a device configured to wirelessly provide media content; and delivering during the designated time slot, via the processor, the second type of media content to a user.

Abstract: The present invention relates to a semiconductor optical amplifier, the semiconductor optical amplifier including: a plurality of optical amplification regions arranged in series; a passive waveguide region provided between optical amplification regions; and first and second electrodes provided on an upper surface of each of the optical amplification regions. The passive waveguide region electrically insulates between the first electrodes and between the second electrodes of the adjacent optical amplification regions and optically connects the adjacent optical amplification regions.

Abstract: In order to form a light receiving element having high reliability and a MOS transistor together on the same silicon substrate, after forming a gate electrode of the MOS transistor, a gate oxide film in a light receiving element forming region is removed. Then, a thermal oxide film is newly formed in the light receiving element forming region, and ion implantation is performed in the light receiving element forming region through the thermal oxide film such that a shallow pn junction is formed.

Abstract: An image sensor includes a first semiconductor layer provided with a pixel, including a photoelectric conversion unit that photoelectrically converts incident light to generate an electric charge, an accumulation unit that accumulates the electric charge generated by the photoelectric conversion unit, and a transfer unit that transfers the electric charge generated by the photoelectric conversion unit to the accumulation unit, a second semiconductor layer provided with a supply unit that supplies the transfer unit with a transfer signal for transferring the electric charge from the photoelectric conversion unit to the accumulation unit, and a third semiconductor layer into which a signal is inputted, the signal being based on the electric charge that has been transferred to the accumulation unit.

Abstract: A DA converter includes a first DA conversion section for obtaining an analog output signal in accordance with a digital input signal value, and a second DA conversion section for obtaining an analog gain control output signal in accordance with a digital gain control input signal value. In the DA converter, the gain control of the analog output signal generated by the first DA conversion section is performed on the basis of the gain control output signal generated by the second DA conversion section.

Abstract: Approaches for silicon photonics integration are provided. A method includes: forming at least one encapsulating layer over and around a photodetector; thermally crystallizing the photodetector material after the forming the at least one encapsulating layer; and after the thermally crystallizing the photodetector material, forming a conformal sealing layer on the at least one encapsulating layer and over at least one device. The conformal sealing layer is configured to seal a crack in the at least one encapsulating layer. The photodetector and the at least one device are on a same substrate. The at least one device includes a complementary metal oxide semiconductor device or a passive photonics device.

Abstract: A CMOS detector with pairs of interdigitated elongated finger-like collection gates includes p+ implanted regions that create charge barrier regions that can intentionally be overcome. These regions steer charge to a desired collection gate pair for collection. The p+ implanted regions may be formed before and/or after formation of the collection gates. These regions form charge barrier regions when an associated collection gate is biased low. The barriers are overcome when an associated collection gate is high. These barrier regions steer substantially all charge to collection gates that are biased high, enhancing modulation contrast. Advantageously, the resultant structure has reduced power requirements in that inter-gate capacitance is reduced in that inter-gate spacing can be increased over prior art gate spacing and lower swing voltages may be used. Also higher modulation contrast is achieved in that the charge collection area of the low gate(s) is significantly reduced.

Abstract: A semiconductor integrated circuit constituting a part of a sensor signal processing apparatus for processing sensor signal output from a sensor includes: a first terminal where one end of a vibrator externally attached to the semiconductor integrated circuit is connected and a second terminal where the other end of the vibrator is connected; and an oscillation circuit oscillating the vibrator connected via the first and second terminals, wherein the oscillator circuit intermittently oscillating the vibrator based on control signal, wherein a first period where the oscillation circuit oscillates the vibrator and a second period where the oscillation circuit does not oscillate the vibrator are alternately switched, wherein, during the first period, potentials of the first and second terminals are alternately switched complementarily to high level and low level, and wherein, during the second period, the potentials of the first terminal and the second terminal are fixed to the low level.

Abstract: An object is to provide an imaging device with high efficiency of transferring charge corresponding to imaging data. The imaging device includes first to fifth conductors, first and second insulators, an oxide semiconductor, a photoelectric conversion element, and a transistor. The first conductor is in contact with a bottom surface and a side surface of the first insulator. The first insulator is in contact with a bottom surface of the oxide semiconductor. The oxide semiconductor is in contact with bottom surfaces of the second and third conductors and the second insulator. Each of the second and third conductors is in contact with the bottom surface and a side surface of the second insulator. The second insulator is in contact with bottom surfaces of the fourth and fifth conductors. The first conductor has regions overlapped by the fourth and fifth conductors. The second conductor has a region overlapped by the fourth conductor. The third conductor has a region overlapped by the fifth conductor.

Abstract: According to one embodiment, a memory element includes a first layer, a second layer, and a third layer. The first layer is conductive. The second layer is conductive. The third layer includes hafnium oxide and is provided between the first layer and the second layer. The first layer includes a first region, a second region, and a third region. The first region includes a first element and a first metallic element. The first element is selected from a group consisting of carbon and nitrogen. The second region includes a second metallic element and is provided between the first region and the third layer. The third region includes titanium oxide and is provided between the second region and the third layer.

Abstract: The present disclosure relates to a semiconductor photomultiplier which comprises one or more microcells on a substrate having at least one terminal. At least one ESD protection element is operably coupled to the at least one terminal.

Abstract: A light emitting structure includes a packaged back-emitting light emitting device mounted on a reflective substrate. The properties of the reflective surface may be controlled to provide a desired luminance pattern. In this manner, the creation of a light emitting structure that provides a desired luminance pattern may be independent of the provider of the packaged light emitting device.

Abstract: A display apparatus includes a first substrate, a second substrate assembled to the first substrate, and several spacers disposed between the first substrate and the second substrate. The first substrate includes a first base plate and a first light-shielding layer disposed on the first base plate, wherein the first light-shielding layer includes several first light-shielding portions extending along a first direction. The second substrate includes a second base plate and a second light-shielding layer disposed on the second base plate, wherein the second light-shielding layer includes several second light-shielding portions extending along a second direction, and the second direction is different from the first direction.

Abstract: A light emitting structure includes a packaged back-emitting light emitting device mounted on a reflective substrate. The properties of the reflective surface may be controlled to provide a desired luminance pattern. In this manner, the creation of a light emitting structure that provides a desired luminance pattern may be independent of the provider of the packaged light emitting device.

Abstract: Image sensors may include multiple vertically stacked photodiodes interconnected using vertical deep trench transfer gates. A first n-epitaxial layer may be formed on a residual substrate; a first p-epitaxial layer may be formed on the first n-epitaxial layer; a second n-epitaxial layer may be formed on the first p-epitaxial layer; a second p-epitaxial layer may be formed on the second n-epitaxial layer; and so on. The n-epitaxial layers may serve as accumulation regions for the different epitaxial photodiodes. A separate color filter array is not needed. The vertical transfer gates may be a deep trench that is filled with doped conductive material, lined with gate dielectric liner, and surrounded by a p-doped region. Image sensors formed in this way may be used to support a rolling shutter configuration or a global shutter configuration and can either be front-side illuminated or backside illuminated.

Abstract: The present invention is for a backplane substrate including an in-cell type touch panel advantageous to reducing the number of masks and the number of processes, a liquid crystal display device including the same, and a method of manufacturing the same, includes a plurality of interlayer dielectric layers disposed above a drain electrode of a thin film transistor are simultaneously patterned after forming a sensing line and a common electrode.

Abstract: A method for monolithic integration of a hyperspectral image sensor is provided, which includes: forming a bottom reflecting layer on a surface of the photosensitive region of a CMOS image sensor wafer; forming a transparent cavity layer composed of N step structures on the bottom reflecting layer through area selective atomic layer deposition processes, where N=2m, m?1 and m is a positive integer; and forming a top reflecting layer on the transparent cavity layer. With the method, non-uniformity accumulation due to etching processes in conventional technology is minimized, and the cavity layer can be made of materials which cannot be etched. Mosaic cavity layers having such repeated structures with different heights can be formed by extending one-dimensional ASALD, such as extending in another dimension and forming repeated regions, which can be applied to snapshot hyperspectral image sensors, for example, pixels, and greatly improving performance thereof.

Abstract: A multi-radiation identification and dosimetry system and method that allows for monitoring of alpha, beta, and gamma radiation is disclosed. The system/method incorporates a segmented silicon drift detector (SSDD) that allows measurement of directly absorbed radiation in the semiconductor (betas, conversion electrons, Lx lines, and alphas) on one SSDD segment and radiation from a radiation scintillation detector (RSD) on multiple segments of the SSDD. With the anode side of the SSDD directed toward the radiation inspection surface (RIS), the SSDD+RSD stacked radiation detector collects radiation which is processed by a charge sensitive amplifier (CSA) and then processed by a time stamping differentiator (TSD). A computing control device (CCD) may be configured to collect the time stamp differentiation data from the various SSDD segments to permit the simultaneous discrimination of several types of radiation by and presentation of these radiation types and counts on a display monitor.

Abstract: An electrostatic discharge (ESD) protection structure containing a bottom diode and a top diode vertically stacked on the bottom diode is provided to render sufficient protection from ESD events with reduced diode footprint. The bottom diode is serially connected to the top diode via a conductive strap structure.

Abstract: In order to form a light receiving element having high reliability and a MOS transistor together on the same silicon substrate, after forming a gate electrode of the MOS transistor, a gate oxide film in a light receiving element forming region is removed. Then, a thermal oxide film is newly formed in the light receiving element forming region, and ion implantation is performed in the light receiving element forming region through the thermal oxide film such that a shallow pn junction is formed.

Abstract: A photodiode according to example embodiments includes an anode, a cathode, and an intrinsic layer between the anode and the cathode. The intrinsic layer includes a P-type semiconductor and an N-type semiconductor, and composition ratios of the P-type semiconductor and the N-type semiconductor vary within the intrinsic layer depending on a distance of the intrinsic layer from one of the anode and the cathode.

Abstract: A chemical sensing field effect transistor device is disclosed. The device can include a control gate structure interfacing a control side of a semiconductor channel region, a source region, and a drain region. The control gate structure can comprise a control gate dielectric and a control gate electrode. The device can include a sensing gate structure interfacing the semiconductor channel region, the source region, and the drain region at a sensing side of the semiconductor channel region opposite the control gate structure. The sensing gate structure can comprise a sensing gate dielectric, and a sensing gate electrode. The device can include a functional layer interfacing the sensing gate electrode opposite the sensing gate dielectric. The functional layer can have an exposed interface surface. The functional layer can be capable of binding with a target analyte material sufficient to create a measurable change in conductivity across the semiconductor channel region.

Abstract: Approaches for silicon photonics integration are provided. A method includes: forming at least one encapsulating layer over and around a photodetector; thermally crystallizing the photodetector material after the forming the at least one encapsulating layer; and after the thermally crystallizing the photodetector material, forming a conformal sealing layer on the at least one encapsulating layer and over at least one device. The conformal sealing layer is configured to seal a crack in the at least one encapsulating layer. The photodetector and the at least one device are on a same substrate. The at least one device includes a complementary metal oxide semiconductor device or a passive photonics device.

Abstract: An organic light emitting display device includes a substrate including a plurality of pixels defined thereon; a first electrode disposed at each pixel; a bank exposing the first electrode of each pixel; a spacer including, sequentially on the bank, a first layer of a first negative photoreactive acryl and a second layer of a second negative photoreactive acryl having a greater photoreactivity than a photoreactivity of the first negative photoreactive acryl, wherein the first layer has a negative taper and the second layer has a positive taper; an organic layer on the bank and the first electrode, the organic layer including an organic light emitting layer; and a second electrode on the bank, the spacer, and the organic layer.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a plurality of first stacked structures and two second stacked structures disposed on the substrate. Each of the first stacked structures includes alternately stacked metal layers and oxide layers. Each of the second stacked structures includes alternately stacked silicon nitride layers and oxide layers. The first stacked structures are disposed between the two second stacked structures.