Abstract: An organic light-emitting device includes: an anode, a hole transport layer over the anode, an electron blocking layer over the hole transport layer, an organic emitting layer contacting the electron blocking layer, an electron transport layer contacting the organic emitting layer, a cathode over the electron transport layer, and a trapping layer between the hole transport layer and the electron blocking layer, wherein a LUMO energy level of the trapping layer: differs from a HOMO energy level of the electron blocking layer within a range of 1 eV, or is equal to the HOMO energy level of the electron blocking layer.

Abstract: An image sensor includes a light-sensing element that generates charge in response to incident light, a storage diode formed in a substrate, wherein the storage diode stores the charge generated by the light-sensing element, a floating diffusion region formed in a top surface of the substrate and spaced apart from the storage diode, and a transfer gate at least partially buried under the top surface of the substrate, wherein the transfer gate controls the transfer of the charge from the storage diode to the floating diffusion region.

Abstract: There is provided an image pickup element including a non-planar layer having a non-planar light incident surface in a light receiving region, and a microlens of an inorganic material which is provided on a side of the light incident surface of the non-planar layer, and collects incident light.

Abstract: Disclosed are phototransistors, and more specifically a detector that includes two or more phototransistors, conductively isolated from each other. Embodiments also relate to methods of making the detector.

Abstract: A semiconductor device including a substrate includes an active region. A bit line structure extends across the active region. A landing pad is disposed on an end portion of the active region. A first spacer is disposed between the bit line structure and the landing pad. A second spacer is disposed between the first spacer and the landing pad. An air spacer is disposed between the first spacer and the second spacer. A capping pattern is disposed between a sidewall of the landing pad and a sidewall of the bit line structure. The capping pattern defines a top surface of the air spacer and comprises a metallic material.

Abstract: A method for operating a multi-level converter is disclosed. A multi-level converter is provided with a plurality of switches connected in series and a flying capacitor connected to switch nodes of the plurality of switches. The switch nodes are biased initially to a fraction of an input voltage when the input voltage is initially applied to the plurality of switches. The flying capacitor is then precharged to a flying capacitor operating voltage. The multi-level converter is then operated after the flying capacitor is precharged by activating control signals to the plurality of switches. Diversion of precharge current by the plurality of switches may be performed while the flying capacitor is being precharged.

Abstract: A semiconductor device having a first semiconductor section including a first wiring layer at one side thereof; a second semiconductor section including a second wiring layer at one side thereof, the first and second semiconductor sections being secured together with the respective first and second wiring layer sides of the first and second semiconductor sections facing each other; a conductive material extending through the first semiconductor section to the second wiring layer of the second semiconductor section and by means of which the first and second wiring layers are in electrical communication; and an opening, other than the opening for the conductive material, which extends through the first semiconductor section to the second wiring layer.

Abstract: An image sensor device is provided. The image sensor device includes a substrate, a plurality of photoelectric conversion units for collecting image signals disposed in the substrate, a first dielectric layer disposed upon the substrate, a plurality of metal layers disposed in the first dielectric layer, a trench disposed in the first dielectric layer and located between the adjacent metal layers, a filling material filled in the trench, a second dielectric layer disposed upon the first dielectric layer, and a light source or a detected object disposed over the second dielectric layer. The metal layer adjacent to the substrate is defined as a first metal layer. The metal layer adjacent to the top of the first dielectric layer is defined as a top metal layer. The trench extends from the top of the first dielectric layer towards the substrate to the first metal layer.

Abstract: A printed circuit board (PCB) assembly having several electronic components mounted on a PCB and a damping layer covering the electronic components, is disclosed. Embodiments of the PCB assembly include an overmold layer constraining the damping layer against the PCB. Embodiments of the PCB assembly include an interposer between a capacitor of the electronic components and the PCB. Other embodiments are also described and claimed.

Abstract: Global shutter imaging pixels may include a charge storage region that receives charge from a respective photodiode. Global shutter imaging pixels may be formed as frontside illuminated imaging pixels or backside illuminated imaging pixels. Shielding charge storage regions from incident light may be important for image sensor performance. To shield charge storage regions in backside illuminated global shutter imaging pixels, shielding structures may be included over the charge storage region. The shielding structures may include backside trench isolation structures, a metal layer formed in a backside trench between backside trench isolation structures, and frontside deep trench isolation structures. The metal layer may have angled portions that reflect light towards the photodiodes.

Abstract: A capacitive sensor for locating the presence of an individual and/or of an object is provided including: a first layer including at least one first electrode extending in a first direction; a second layer having at least one second electrode extending in a second direction; in which the first direction is different from the second direction, and in which the first layer is electrically insulated from the second layer.

Abstract: A semiconductor device in which the cell size is small and disturbance in reading operation is suppressed, and a method for manufacturing the semiconductor device. A first memory cell has a first memory transistor. A second memory cell has a second memory transistor. A control gate is shared by the first memory cell and the second memory cell. In plan view, the control gate is sandwiched between a first memory gate of the first memory transistor and a second memory gate of the second memory transistor.

Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to back gate tuning circuits and methods of manufacture. The method includes applying a voltage to a back gate of a device; and selectively controlling the applied voltage to deactivate at least one trap within an insulating layer of the device to reduce noise contribution from the at least one trap.

Abstract: A photoelectric conversion device according to the present invention has a plurality of photoreceiving portions provided in a substrate, an interlayer film overlying the photoreceiving portion, a large refraction index region which is provided so as to correspond to the photoreceiving portion and has a higher refractive index than the interlayer film, and a layer which is provided in between the photoreceiving portion and the large refraction index region, and has a lower etching rate than the interlayer film, wherein the layer of the lower etching rate is formed so as to cover at least the whole surface of the photoreceiving portion. In addition, the layer of the lower etching rate has a refractive index in between the refractive indices of the large refraction index region and the substrate. Such a configuration can provide the photoelectric conversion device which inhibits the lowering of the sensitivity and the variation of the sensitivity among picture elements.

Abstract: An imaging apparatus includes a unit pixel including a pixel electrode, a charge accumulation region electrically connected to the pixel electrode, and a signal detection circuit electrically connected to the charge accumulation region; a counter electrode facing the pixel electrode; a photoelectric conversion layer disposed between the electrodes; and a voltage supply circuit configured to selectively apply any one of first, second, and third voltages between the electrodes. The photoelectric conversion layer exhibits first and second wavelength sensitivity characteristics in a wavelength range when the voltage supply circuit applies the first and second voltages between the electrodes, respectively, and becomes insensitive to light in the wavelength range when the voltage supply circuit applies the third voltage between the electrodes.

Abstract: A semiconductor device for miniaturization is provided. The semiconductor device includes a semiconductor layer; a first electrode and a second electrode that are on the semiconductor layer and apart from each other over the semiconductor layer; a gate electrode over the semiconductor layer; and a gate insulating layer between the semiconductor layer and the gate electrode. The first and second electrodes comprise first conductive layers and second conductive layers. In a region overlapping with the semiconductor layer, the second conductive layers are positioned between the first conductive layers, and side surfaces of the second conductive layers are in contact with side surfaces of the first conductive layers. The second conductive layers have smaller thicknesses than those of the first conductive layers, and the top surface levels of the second conductive layers are lower than those of the first conductive layers.

Abstract: The present technology relates to an image sensor and an electronic device capable of performing imaging in which mixed color is reduced.

Abstract: A method for spatially-adaptive tone mapping in an image having high dynamic range includes using a computing device to receive an input image from an image sensor comprising a plurality of pixels having pixel locations and determine within the input image a plurality of local size scales, each comprising a neighborhood having substantially constant illumination. The variation in reflectance within each neighborhood is estimated and local contrast within each neighborhood is enhanced. Using the illumination and variation within the contrast-enhanced neighborhoods, the image is remapped to a reduced dynamic range to generate an output image.

Abstract: An organic light-emitting device includes a first electrode layer; a hole injection layer on the first electrode layer; a hole transport layer on the hole injection layer; an electron blocking layer on the hole transport layer, and including a plurality of layers; a light-emitting layer on the electron blocking layer; an electron transport layer on the light-emitting layer; an electron injection layer on the electron transport layer; and a second electrode layer on the electron transport layer, wherein the electron blocking layer has a highest occupied molecular orbital value which is lower than a highest occupied molecular orbital value of the hole transport layer, and the light-emitting layer has a HOMO value which is lower than a highest occupied molecular orbital value of the electron blocking layer.

Abstract: An image processing apparatus having a plurality of Bayer arrays each including 4 pixels sharing a common electrode connected to a vertical signal line wherein: each of the pixels has a pixel electrode connected to a horizontal signal line; and the location of each of the horizontal signal lines and the location of each of the pixel electrodes each connected to one of the horizontal signal lines are determined so that the locations in a neighboring Bayer array are a mirror image of counterpart locations in another Bayer array adjacent to the neighboring Bayer array.

Abstract: Embodiments of the disclosure provide an organic light-emitting diode component and a manufacturing method, a display panel and a display device. The organic light-emitting diode component includes: a first electrode layer, a light-emitting layer and a second electrode layer in sequence. The organic light-emitting diode component further includes an insulation layer and an auxiliary electrode layer. The insulation layer is above the second electrode layer. The auxiliary electrode layer is above the insulation layer and electrically connected to the first electrode layer. According to embodiments of the disclosure, while improving a problem of uneven light emission, the auxiliary electrode layer is prevented from blocking the light emitted by the organic light-emitting diode component. Also, an etching process is not necessary for forming the auxiliary electrode layer.

Abstract: A display device includes a display panel and a grating layer inside or outside the display panel. The display panel includes R pixels, G pixels and B pixels. The grating layer includes a R grating region, a G grating region and a B grating region; along a direction from a center of a central area of the view field of the display device to a non-central area of the view field, each of grating periods of the R, G and B grating regions gradually decreases; and lights emitted from positions of the display device corresponding to the R pixel, the G pixel and the B pixel are emitted respectively along straight lines formed by the position of the R pixel and the viewer, formed by the position of the G pixel and the viewer and formed by the position of the B pixel and the viewer.

Abstract: A transistor device includes a transistor implemented over a semiconductor substrate, one or more dielectric layers formed over the transistor, and a handle wafer layer disposed on at least a portion of the one or more dielectric layers, the handle wafer layer including a topside trench defined at least in part by sidewall portions of the handle wafer layer.

Abstract: An image sensor has a stacked pixel arrangement including both rolling and global shutter readout circuits wherein each pixel includes an adjustable transfer transistor gate voltage level for modifying electric charge within a photodiode during exposure depending on incident light intensity. The sensor also has a row decoder circuit providing readout signals to each row of the imaging cells during both a readout interval and during a calibration interval for each row. The row decoder may employ one of several of its features to provide a self-knee point calibration following an image signal readout in order to minimize photo conversion variations that lead to fixed pattern noise and to enhance dynamic range.

Abstract: An imaging system (102) includes a detector array (104) with a ring (106) with a first layer (110i) that detects gamma radiation and X-ray radiation and a second layer (110N) that detects only gamma radiation, wherein the first and second layers are concentric closed rings. A method includes detecting gamma radiation with a first layer of a dual layer detector in response to imaging in PET mode, detecting gamma radiation with a second layer of the dual layer detector in response to imaging in PET mode, and generating PET image data with the radiation detected with the first and second layers. The method further includes detecting X-ray radiation with the first layer in response to imaging in CT mode and generating CT image data the radiation detected with the first layer. The method further includes displaying the image data. The imaging system allows a single gantry for both PET/CT imaging.

Abstract: A solid-state image pickup element including: a photoelectric conversion region; a transistor; an isolation region of a first conductivity type configured to isolate the photoelectric conversion region and the transistor from each other; a well region of the first conductivity type having the photoelectric conversion region, the transistor, and the isolation region of the first conductivity type formed therein; a contact portion configured to supply an electric potential used to fix the well region to a given electric potential; and an impurity region of the first conductivity type formed so as to extend in a depth direction from a surface of the isolation region of the first conductivity type in the isolation region of the first conductivity type between the contact portion and the photoelectric conversion region, and having a sufficiently higher impurity concentration than that of the isolation region of the first conductivity type.

Abstract: An image sensor suitable for low light level imaging, the image sensor having a plurality of pixels, each pixel having nMOS and pMOS components, provides a lower noise threshold as compared to prior art single-flavor pixels.

Abstract: The invention relates to a structure of a semiconductor chip (100) comprising photosensitive elements (104) for image capturing. The semiconductor chip (100) comprises a set of photosensitive elements (104) for forming electric signals on the basis of electromagnetic radiation received by the photosensitive elements (104); and other electronic circuitry. A surface of the semiconductor chip comprises a first region (102) and a second region (110); and the set of photosensitive elements (104) is located in the first region (102) and the other electronic circuitry is located in the second region (110). The invention also relates to methods, apparatuses, and computer program products.

Abstract: A CMOS image sensor includes a substrate and at least one device isolation region in the substrate and defining first and second pixel regions and first and second active portions in each of the first and second pixel regions. A reset and select transistor gates are disposed in the first pixel region, while a source follower transistor gate is disposed in the second pixel region, such that pixels in the first and second pixel regions share the reset, select and source follower transistors. A length of the source follower transistor gate may be greater than lengths of the reset and selection transistor gates.

Abstract: A photodiode (PD) of a complementary metal-oxide-semiconductor (CMOS) image sensor includes a top PD of a second type disposed in a first-type layer; and a bottom PD of the second type disposed in the first-type layer and below the top PD, the bottom PD including at least one sub-photodiode (sub-PD) of the second type connected to the top PD and at least one sub-well of the first type surrounded by the at least one sub-PD.

Abstract: Image sensors and image processing devices including the image sensors are provided. The image sensors may include a semiconductor substrate including a plurality of pixel areas, a photodiode provided in the semiconductor substrate in one of the plurality of pixel areas and a transfer transistor having a transfer gate electrode. A portion of the transfer gate electrode may be in the semiconductor substrate and may extend toward the photodiode. The image sensors may also include a floating diffusion configured to accumulate charges transferred from the photodiode by the transfer transistor, and the floating diffusion may include a first area and a second area disposed on different sides of the transfer gate electrode.

Abstract: A display device including a TFT substrate and a display layer is provided. The TFT substrate includes a substrate, a gate layer, a semiconductor layer, a gate dielectric layer, a first electrode layer, a first passivation layer, a second passivation layer, and a second electrode layer. A via penetrates the first passivation layer and the second passivation layer to expose a portion of the first electrode layer, and the via has a sidewall. The second electrode layer is electrically connected to the first electrode layer through the via, the first passivation layer has a first edge on the sidewall of the via, the second passivation layer has a second edge on the sidewall of the via, and the first edge and the second edge are separated by a distance in the range of 500-2000 ?.

Abstract: Disclosed herein is a phototransistor (PT) comprising an emitter, a collector and a floating base; wherein the floating base, a p-n junction between the emitter and base (E-B junction) and a p-n junction between the base and the collector (B-C junction) are collectively in direct physical contact only with and completely encapsulated only by the emitter, the collector, and a section of a dielectric. Under an operating condition of the PT, a DC current density averaged over the E-B junction or a DC current density averaged over the B-C junction may be at least 100 times of a DC current density averaged over an opto-electronically active region of the PT. A sum of a capacitance of the E-B junction and a capacitance of the B-C junction may be less than 1 fF.

Abstract: An improvement is achieved in the performance of a semiconductor device. A semiconductor device includes a pixel including a first active region where a photodiode and a transfer transistor are formed and a second active region for supplying a grounding potential. Over a p-type semiconductor region in the second active region, a plug for supplying the grounding potential is disposed. In an n-type semiconductor region for a drain region of the transfer transistor formed in the first active region, a gettering element is introduced. However, in the p-type semiconductor region in the second active region, the gettering element is not introduced.

Abstract: A device for sensing light includes a first semiconductor region doped with a dopant of a first type and a second semiconductor region doped with a dopant of a second type. The second semiconductor region is positioned above the first semiconductor region. The device includes a gate insulation layer; a gate, a source, and a drain. The second semiconductor region has a top surface that is positioned toward the gate insulation layer and a bottom surface that is positioned opposite to the top surface of the second semiconductor region. The second semiconductor region has an upper portion that includes the top surface of the second semiconductor region and a lower portion that includes the bottom surface of the second semiconductor region and is mutually exclusive with the upper portion. The first semiconductor region is in contact with both the upper portion and the lower portion of the second semiconductor region.

Abstract: A solid-state imaging device includes a first-conductivity-type semiconductor well region, a plurality of pixels each of which is formed on the semiconductor well region and is composed of a photoelectric conversion portion and a pixel transistor, an element isolation region provided between the pixels and in the pixels, and an element isolation region being free from an insulation film and being provided between desired pixel transistors.

Abstract: Systems and methods for providing a solid state image sensor (30) are provided. More particularly, an image sensor (30) that suppresses color mixing is provided. Moreover, embodiments of the present disclosure provide for the creation of light blocking features (32) that avoid the creation of stress concentrations. More particularly, embodiments of the present disclosure provide for the creation of light blocking structures (32) using trenches formed in a substrate (44) that are arranged such that no two trenches intersect one another.

Abstract: A light shield for shielding a light sensitive element in an image sensor comprising a primary plate located such as to shield the light sensitive element from incident light, the primary plate comprising at least one aperture and the or each aperture being associated with a light blocking structure, wherein the light blocking structure comprises a secondary plate and a wall; the wall is arranged between the primary plate and the secondary plate, and is configured to act as a light barrier to light passing between the primary plate and the secondary plate.

Abstract: A device includes an image sensor chip having formed therein an elevated photodiode, and a device chip underlying and bonded to the image sensor chip. The device chip has a read out circuit electrically connected to the elevated photodiode.

Abstract: An imaging device including a unit pixel cell including a semiconductor substrate having a surface including a first area and a second area surrounded by the first area. The semiconductor substrate including a first region of a first conductivity type exposed to the surface in the first area, and a second region of a second conductivity type directly adjacent to the first region and exposed to the surface in the second area; a photoelectric converter; an amplifier; a contact plug connected to the second region; a first transistor including a first electrode; a second electrode covering a second portion of the first area; and a second insulation layer between the second electrode and the semiconductor substrate. When viewed in a direction perpendicular to the surface of the semiconductor substrate, a contact between the second region and the contact plug is located between the first electrode and the second electrode.

Abstract: An example image capture device includes an image sensor having diodes for sensing light from a target scene, a color filter array disposed above the diodes and including color filters each positioned over one of the diodes, single-diode microlenses positioned above some color filters arranged in a Bayer pattern, and multi-diode microlenses each positioned above at least two adjacent color filters that pass the same wavelengths of light to corresponding adjacent diodes below the color filters, each multi-diode microlens formed such that light incident in a first direction is collected one of the adjacent diodes and light incident in a second direction is collected in another of adjacent diodes. An image signal processor of the image capture device can perform phase detection autofocus using signals received from the adjacent diodes and can interpolate color values for the adjacent diodes.

Abstract: A method of manufacturing a solid-state image sensor, includes forming a first isolation region of a first conductivity type in a semiconductor layer having first and second surfaces, the forming the first isolation region including first implantation for implanting ions into the semiconductor layer through the first surface, forming charge accumulation regions of a second conductivity type in the semiconductor layer, performing first annealing, forming an interconnection on a side of the first surface of the semiconductor layer after the first annealing, and forming a second isolation region of the first conductivity type in the semiconductor layer, the forming the second isolation region including second implantation for implanting ions into the semiconductor layer through the second surface. The first and second isolation regions are arranged between the adjacent charge accumulation regions.

Abstract: An imaging device and a manufacturing method of the imaging device are provided, which can lower the level of a dark current in an optical black pixel without forming a new layer such as a hydrogen diffusion preventing film. Both of an insulating layer over a photodiode arranged over an effective pixel region and an insulating layer over a photodiode arranged over an OB pixel region include silicon nitride, are formed of the same layer, and are coupled with each other.

Abstract: A method for manufacturing a solid state image pickup apparatus, including the steps of forming, by removing part of an insulating layer by using a first mask, a first contact opening on an impurity region, and a second contact opening over a compound layer such that a first portion, which covers the compound layer, of the insulating layer is exposed at a bottom of the second contact opening, and ion-implanting an impurity into the impurity region through the first contact opening while the first portion covering the compound layer is exposed at the second contact opening, wherein the impurity region is disposed in a pixel region including a photoelectric conversion unit, and the compound layer is disposed on at least one of a gate electrode, a drain region, and a source region of a transistor disposed in a peripheral circuit region and is composed of a metal and a semiconductor.

Abstract: A method for making a CMOS device includes: providing a substrate with a semiconductor layer and a photoresist layer; irradiating the photoresist layer through a mask to obtain a first photoresist and a second photoresist having a height smaller than that of the first photoresist; first implanting ions to the semiconductor layer; ashing the first and second photoresists to expose a first region of the semiconductor layer and removing the second photoresist to expose a second region of the semiconductor layer; secondly implanting ions to the semiconductor layer; removing the first photoresist to expose a third region of the semiconductor layer surrounded by the second region; forming a third photoresist and a fourth photoresist on the semiconductor layer; etching the semiconductor layer to remove the semiconductor layer not covered by the third and fourth photoresists; removing the third and fourth photoresists; and thirdly implanting ions to the semiconductor layer.

Abstract: A display device includes a plurality of pixel electrodes, an insulating layer that includes a plurality of through holes each overlapping each of the pixel electrodes and covers a periphery of each of the pixel electrodes, a light-emitting layer over at least one of the pixel electrodes, a common electrode on the insulating layer and the light-emitting layer, a sealing layer that seals the light-emitting layer and located on the common electrode, a counter substrate, and an adhesive layer that adheres the counter substrate to the sealing layer. An upper surface of the insulating layer has a first area which does not overlap the light-emitting layer in a plan view, and the adhesive layer is located at least on the first area.

Abstract: A backside illuminated image sensor includes a substrate, a backside passivation layer disposed on backside of the substrate, and a transparent conductive layer disposed on the backside passivation layer.

Abstract: A solid state imaging apparatus includes an insulation structure formed of an insulation substance penetrating through at least a silicon layer at a light receiving surface side, the insulation structure having a forward tapered shape where a top diameter at an upper portion of the light receiving surface side of the silicon layer is greater than a bottom diameter at a bottom portion of the silicon layer. Also, there are provided a method of producing the solid state imaging apparatus and an electronic device including the solid state imaging apparatus.

Abstract: An image sensor includes: a pixel array including a plurality of unit pixels that are arrayed in two dimensions, wherein each of the plurality of the unit pixels includes: a substrate that including a photoelectric conversion element; a recess pattern formed in the substrate to overlap with the photoelectric conversion element and correspond to a center of the photoelectric conversion element; a first gate suitable for filling at least the recess pattern; a second gate formed over the substrate to overlap with the photoelectric conversion element and to be adjacent to the first gate in a first diagonal direction; and a third gate formed over the substrate to overlap with the photoelectric conversion element and to be adjacent to the first gate in a second diagonal direction which intersects with the first diagonal direction.

Abstract: An optical sensor includes a sensing layer, a color filter, and a grid structure. The sensing layer includes a photodiode. The color filter includes a lower portion disposed on the sensing layer, and an upper portion disposed on the lower portion. The upper portion includes a bottom surface connected to the lower portion, a first inclined surface inclined relative to the bottom surface, and a second inclined surface that is opposite to the first inclined surface and inclined relative to the bottom surface. The grid structure surrounds the upper portion. Between the first inclined surface and the bottom surface is a first acute angle, and between the second inclined surface and the bottom surface is a second acute angle.