Patents by Inventor Hua Wang

Hua Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11985399
    Abstract: A photographing apparatus and an inspection device are provided. The photographing apparatus comprises a camera, a light supplementing structure, and a closed housing; the camera is provided with a lens, and positioned in and connected to the housing; the housing is provided with at least one photographing portion configured to be attached to an object to be photographed, and a space is formed between the lens and the photographing portion; the light supplementing structure is positioned in and connected to the housing, the light supplementing structure is configured to emit light to said object through the space and the photographing portion, and the lens is configured to capture an image of said object via the photographing portion. The inspection device comprises a rack and the photographing apparatus, and the housing is connected to the rack.
    Type: Grant
    Filed: May 25, 2020
    Date of Patent: May 14, 2024
    Assignee: SICHUAN ENERGY INTERNET RESEARCH INSTITUTE, TSINGHUA UNIVERSITY
    Inventors: Yongcan Chen, Hua Zhang, Haoran Wang, Yonglong Li, Jialong Li, Zhaowei Liu, Shuang Wang
  • Patent number: 11984381
    Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a carrier substrate, an interposer substrate, a semiconductor device, a lid, and a thermal interface material. The interposer substrate is disposed on the carrier substrate. The semiconductor device is disposed on the interposer substrate. The lid is disposed on the carrier substrate to cover the semiconductor device. The thermal interface material is disposed between the lid and the semiconductor device. A first recess is formed on a lower surface of the lid facing the semiconductor device, and the first recess overlaps the semiconductor device in a top view.
    Type: Grant
    Filed: November 16, 2021
    Date of Patent: May 14, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Chen Lai, Ming-Chih Yew, Po-Yao Lin, Chin-Hua Wang, Shin-Puu Jeng
  • Patent number: 11984797
    Abstract: The present disclosure provides an adapter circuit including a bus capacitor, a PMOS power transistor, and a sampling control module; a positive terminal of the bus capacitor is connected to a DC bus voltage, and a negative terminal of the bus capacitor is connected to a drain of the PMOS power transistor; a gate of the PMOS power transistor is connected to a drive signal, and a source of the PMOS power transistor is grounded; the sampling control module is used to obtain the drive signal by detecting an AC mains input voltage and a power-down voltage when the bus discharges, so as to turn off the PMOS power transistor after the AC mains input voltage reaches a peak value, and turn on the PMOS power transistor after the power-down voltage reaches a set voltage; the drive signal includes a PMOS Turn-on signal and a PMOS Turn-off signal.
    Type: Grant
    Filed: July 5, 2023
    Date of Patent: May 14, 2024
    Assignee: ZHEJIANG UNIVERSITY
    Inventors: Faxin Yu, Yihe Wang, Xiaofeng Lv, Hua Chen, Jiongjiong Mo, Zhiyu Wang
  • Patent number: 11984510
    Abstract: The present application discloses a composite metal oxide semiconductor which is a metal oxide semiconductor doped with a rare earth oxide. Even doping the praseodymium oxide or ytterbium oxide at a small doping amount, oxygen vacancies could be suppressed as well as the mobility be maintained; critically, the thin-films made thereof can avoid the influence of light on I-V characteristics and stability, which results in great improvement of the stability under illumination of metal oxide semiconductor devices. The present application also disclose the thin-film transistors made thereof the composite metal oxide semiconductor and its application.
    Type: Grant
    Filed: November 8, 2019
    Date of Patent: May 14, 2024
    Assignee: South China University of Technology
    Inventors: Miao Xu, Hua Xu, Weijing Wu, Weifeng Chen, Lei Wang, Junbiao Peng
  • Patent number: 11985514
    Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may receive information identifying a sidelink discontinuous reception (DRX) configuration, that is different from an access link DRX configuration, associated with operation in a sidelink communication deployment. The UE may monitor a physical downlink control channel (PDCCH) discontinuously using the sidelink DRX configuration. Numerous other aspects are described.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: May 14, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Jung Ho Ryu, Sony Akkarakaran, Junyi Li, Tao Luo, Juan Montojo, Jelena Damnjanovic, Hua Wang
  • Patent number: 11984378
    Abstract: A semiconductor package structure includes an interposer substrate formed over a package substrate. The structure also includes a die disposed over the interposer substrate. The structure also includes a first heat spreader disposed over the package substrate. The structure also includes a second heat spreader disposed over the die and connected to the first heat spreader. The coefficient of thermal expansion (CTE) of the first heat spreader and the coefficient of thermal expansion of the second heat spreader are different.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shu-Shen Yeh, Po-Yao Lin, Chin-Hua Wang, Yu-Sheng Lin, Shin-Puu Jeng
  • Publication number: 20240155699
    Abstract: Methods and apparatus for offloading wireless connections are disclosed. An example method includes configuring a wireless offload engine to maintain a wireless connection on behalf of one or more circuits coupled to the wireless offload engine, determining that the one or more circuits are to enter a low-power state, and maintaining the wireless connection after the one or more circuits have entered the low-power state based at least in part on the configuring.
    Type: Application
    Filed: November 4, 2022
    Publication date: May 9, 2024
    Inventors: Shao-Hua FENG, Chun-Guang WANG
  • Publication number: 20240154629
    Abstract: A 24 GHz band-pass filter includes a step impedance resonator, a first U-shape feeding portion, a second U-shape feeding portion, short-circuit stubs and open-circuit stubs. The step impedance resonator includes a first main portion, a second main portion, and a connection portion for connecting the main portions to each other. The first main portion and the second main portion are electrically connected to a first signal input/output port and a second signal input/output port. The first U-shape feeding portion is electrically connected between the first main portion and the first signal input/output port. The second U-shape feeding portion is electrically connected between the second main portion and the second signal input/output port. The short-circuit stubs are electrically connected to coupling segments of the step impedance resonator. The open-circuit stubs are electrically connected to the first U-shape feeding portion and the second U-shape feeding portion.
    Type: Application
    Filed: November 1, 2023
    Publication date: May 9, 2024
    Inventors: Kun Yen TU, Meng-Hua TSAI, Wei Ting LEE, Sin-Siang WANG
  • Publication number: 20240153840
    Abstract: A method for forming a package structure is provided. The method includes disposing a semiconductor die over a carrier substrate, wherein a removable film is formed over the semiconductor die, disposing a first stacked die package structure over the carrier substrate, wherein a top surface of the removable film is higher than a top surface of the first stacked die package structure, and removing the removable film to expose a top surface of the semiconductor die, wherein a top surface of the semiconductor die is lower than the top surface of the first stacked die package structure.
    Type: Application
    Filed: January 18, 2024
    Publication date: May 9, 2024
    Inventors: Shin-Puu JENG, Po-Yao LIN, Feng-Cheng HSU, Shuo-Mao CHEN, Chin-Hua WANG
  • Publication number: 20240151736
    Abstract: The disclosure provides an apparatus for high throughput analysis of samples and a method of making an assay card and performing an assay using the apparatus. The apparatus can include a transporter to position and advance a first plate of the QMAX card, a first dispenser to deposit a sample on the first plate, a second dispenser to dispense a reagent to contact the sample, a press to compress the sample between the first and second plates of the QMAX card into a uniformly thick layer, and an imager to image the uniformly thick layer.
    Type: Application
    Filed: January 12, 2024
    Publication date: May 9, 2024
    Applicant: Essenlix Corporation
    Inventors: Stephen Y. CHOU, Hua TAN, Yanjun WANG, Wei DING
  • Publication number: 20240153839
    Abstract: A semiconductor package structure includes an interposer substrate formed over a package substrate. The structure also includes a die disposed over the interposer substrate. The structure also includes a first heat spreader disposed over the package substrate. The structure also includes a second heat spreader disposed over the die and connected to the first heat spreader. The coefficient of thermal expansion (CTE) of the first heat spreader and the coefficient of thermal expansion of the second heat spreader are different.
    Type: Application
    Filed: January 12, 2024
    Publication date: May 9, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shu-Shen YEH, Po-Yao LIN, Chin-Hua WANG, Yu-Sheng LIN, Shin-Puu JENG
  • Publication number: 20240152880
    Abstract: A multi-channel payment method for a multi-channel payment system comprises the payer or the payee who initiated the payment request logs in to the multi-channel payment system; the payer or the payee who initiated the payment request placing an order in the multi-channel payment system, wherein the order comprises a designated payment gateway; the multi-channel payment system determining a predicted fee of the order according to the designated payment gateway, past order records, and a real-time exchange rate; the multi-channel payment system performing an anti-money laundering verification of the order; the payer reviewing the order and the predicted fee through a multiple auditing method; and the multi-channel payment system executing payment from the payer to the payee according to the order and the designated payment gateway, and storing a payment detail of the order.
    Type: Application
    Filed: February 13, 2023
    Publication date: May 9, 2024
    Applicant: OBOOK INC.
    Inventors: Chun-Kai Wang, Chung-Han Hsieh, Chun-Jen Chen, Po-Hua Lin, Wei-Te Lin, Pei-Hsuan Weng, Mei-Su Wang, I-Cheng Lin, Cheng-Wei Chen
  • Patent number: 11977850
    Abstract: A method for dialogue processing, an electronic device and a storage medium are provided. The specific technical solution includes: obtaining a dialogue history; selecting a target machine from a plurality of machines; inputting the dialogue history into a trained dialogue model in the target machine to generate a response to the dialogue history, in which the dialogue model comprises a common parameter and a specific parameter, and different machines correspond to the same common parameter.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: May 7, 2024
    Assignee: BEIJING BAIDU NETCOM SCIENCE AND TECHNOLOGY CO., LTD.
    Inventors: Fan Wang, Siqi Bao, Huang He, Hua Wu, Jingzhou He, Haifeng Wang
  • Patent number: 11979903
    Abstract: A base station may instruct a UE to use at least one weighting factor associated with a CR for the UE, and the UE may apply the at least one weighting factor to the one or more resources scheduled for the PSSCH transmission to determine the CR. The UE may transmit the PSSCH in the one or more resources of the at least one slot based on the determined CR being less than or equal to a CR threshold value. The at least one weighting factor may be applied to the one or more resources in each of multiple slots scheduled for transmission of a PSSCH.
    Type: Grant
    Filed: April 15, 2021
    Date of Patent: May 7, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Hua Wang, Sony Akkarakaran, Jung Ho Ryu, Tao Luo, Junyi Li
  • Patent number: 11978417
    Abstract: A pixel array substrate includes multiple data lines, multiple scan lines and multiple pixel structures. The scan lines include an m-th scan line and an (m+1)-th scan line arranged in sequence, and m is a positive integer. The pixel structures include first to twenty-fourth pixel structures. A control terminal of a transistor of the seventh pixel structure and a control terminal of a transistor of the eighth pixel structure are electrically connected to the (m+1)-th scan line and the m-th scan line respectively. A control terminal of a transistor of the thirteenth pixel structure and a control terminal of a transistor of the fourteenth pixel structure are electrically connected to the (m+1)-th scan line and the m-th scan line respectively.
    Type: Grant
    Filed: June 26, 2023
    Date of Patent: May 7, 2024
    Assignee: AUO Corporation
    Inventors: Shiuan-Hua Huang, Lin-Chieh Wei, Chun-Min Wang
  • Patent number: 11978678
    Abstract: A display device includes a first substrate, a light-emitting element, a light conversion layer, and a color filter layer. The light-emitting element is disposed on the first substrate. The light conversion layer is disposed on the light-emitting element. In addition, the color filter layer is overlapped the light-emitting element and the light conversion layer.
    Type: Grant
    Filed: August 5, 2022
    Date of Patent: May 7, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Tung-Kai Liu, Tsau-Hua Hsieh, Wei-Cheng Chu, Chun-Hsien Lin, Chandra Lius, Ting-Kai Hung, Kuan-Feng Lee, Ming-Chang Lin, Tzu-Min Yan, Hui-Chieh Wang
  • Publication number: 20240141786
    Abstract: An active control method and device for large deformation of a deep thin-bedded surrounding rock, the active control method includes: drill holes in the surrounding rock of a tunnel against a tunnel face, add the active control device containing a sleeve, a high-strength prestressed anchor bolt, a resin anchoring agent and a grouting device into drill holes, apply a preload to the anchor bolt when the resin anchoring agent has a certain strength, and carry out lag grouting in the surrounding rock through the grouting device after stress adjustment, and the high-strength prestressed anchor bolt and the grouting device are inserted in the sleeve with holes on the side. The active control device or method of the invention can effectively reduce the fracture depth and degree of a thin-bedded soft rock in deep engineering, and effectively inhibit the occurrence of large deformation disasters.
    Type: Application
    Filed: October 30, 2023
    Publication date: May 2, 2024
    Inventors: Hua Zhou, Yelin Feng, Fugang Zhao, Pengzhi Pan, Hailong Huang, Zhaofeng Wang, Xufeng Liu, Yangyi Zhou, Longhai Xi, Xuanjiao Zhen
  • Publication number: 20240142732
    Abstract: A method includes forming a first waveguide over a substrate; forming a first layer of low-dimensional material on the first waveguide; forming a first layer of dielectric material over the first layer of low-dimensional material; forming a second layer of low dimensional material on the first layer of dielectric material; and forming a first conductive contact that electrically contacts the first layer of low-dimensional material and a second conductive contact that electrically contacts the second layer of low-dimensional material.
    Type: Application
    Filed: January 6, 2023
    Publication date: May 2, 2024
    Inventors: Chih-Hsin Lu, Chin-Her Chien, Chung-Hao Tsai, Chuei-Tang Wang, Chen-Hua Yu
  • Patent number: 11973001
    Abstract: Semiconductor devices and methods of manufacture which utilize lids in order to constrain thermal expansion during annealing are presented. In some embodiments lids are placed and attached on encapsulant and, in some embodiments, over first semiconductor dies. As such, when heat is applied, and the encapsulant attempts to expand, the lid will work to constrain the expansion, reducing the amount of stress that would otherwise accumulate within the encapsulant.
    Type: Grant
    Filed: May 5, 2023
    Date of Patent: April 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shu-Shen Yeh, Chin-Hua Wang, Chia-Kuei Hsu, Po-Yao Lin, Shin-Puu Jeng
  • Patent number: 11973474
    Abstract: The disclosed technology includes device, systems, techniques, and methods for amplifying a complex modulated signal with a broadband power amplifier. A broadband power amplifier may include an input network connected a long an input signal path, a driver stage, an interstage matching network stage, a power amplification stage, and a broadband matching output network. The broadband matching output network may include two coupled transmission lines and a compensation line connected between the two coupled transmission lines. Further, the broadband matching output network may include a capacitor connected with a secondary winding and a capacitor connected to each of the primary windings. The disclosed technology further includes transmission systems incorporating the broadband power amplifier.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: April 30, 2024
    Assignee: Georgia Tech Research Corporation
    Inventors: Fei Wang, Hua Wang