Patents by Inventor Hua Wang
Hua Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11991873Abstract: Embodiments herein describe techniques for a semiconductor device including a substrate, a first inter-level dielectric (ILD) layer above the substrate, and a second ILD layer above the first ILD layer. A first capacitor and a second capacitor are formed within the first ILD layer and the second ILD layer. A first top plate of the first capacitor and a second top plate of the second capacitor are formed at a boundary between the first ILD layer and the second ILD layer. The first capacitor and the second capacitor are separated by a dielectric area in the first ILD layer. The dielectric area includes a first dielectric area that is coplanar with the first top plate or the second top plate, and a second dielectric area above the first dielectric area and to separate the first top plate and the second top plate. Other embodiments may be described and/or claimed.Type: GrantFiled: February 14, 2023Date of Patent: May 21, 2024Assignee: Intel CorporationInventors: Travis W. Lajoie, Abhishek A. Sharma, Van H. Le, Chieh-Jen Ku, Pei-Hua Wang, Jack T. Kavalieros, Bernhard Sell, Tahir Ghani, Gregory George, Akash Garg, Julie Rollins, Allen B. Gardiner, Shem Ogadhoh, Juan G. Alzate Vinasco, Umut Arslan, Fatih Hamzaoglu, Nikhil Mehta, Yu-Wen Huang, Shu Zhou
-
Patent number: 11991641Abstract: Network-controlled power control for side-link communications is disclosed. According to the described aspects, a power control framework is defined for network-controlled side-band or device-to-device (D2D) communications, in which transmission power for side-link communications may be stepped up enough for a base station in a connected mode with at least one of multiple user equipment (UE) devices to detect side-link communications between the UEs in order to take responsive action to enhance the reliability of the communications. The base station provides the configuration information to the UEs which may be used when preparing for transmissions of side-link traffic and/or feedback.Type: GrantFiled: August 18, 2020Date of Patent: May 21, 2024Assignee: QUALCOMM IncorporatedInventors: Yisheng Xue, Piyush Gupta, Xiaoxia Zhang, Jing Sun, Seyed Ali Akbar Fakoorian, Hua Wang
-
Publication number: 20240162159Abstract: Semiconductor package includes a pair of dies, a redistribution structure, and a conductive plate. Dies of the pair of dies are disposed side by side. Each die includes a contact pad. Redistribution structure is disposed on the pair of dies, and electrically connects the pair of dies. Redistribution structure includes an innermost dielectric layer, an outermost dielectric layer, and a redistribution conductive layer. Innermost dielectric layer is closer to the pair of dies. Redistribution conductive layer extends between the innermost dielectric layer and the outermost dielectric layer. Outermost dielectric layer is furthest from the pair of dies. Conductive plate is electrically connected to the contact pads of the pair of dies. Conductive plate extends over the outermost dielectric layer of the redistribution structure and over the pair of dies. Vertical projection of the conductive plate falls on spans of the dies of the pair of dies.Type: ApplicationFiled: January 25, 2024Publication date: May 16, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chung-Hao Tsai, Chen-Hua Yu, Chuei-Tang WANG, Wei-Ting Chen, Chien-Hsun Chen, Shih-Ya Huang
-
Publication number: 20240163987Abstract: A dimming circuit is configured to generate a dimming signal to control a brightness of a light emitting device. The brightness is correlated with a duty ratio of the dimming signal. The dimming circuit is configured to count a conduction time of the dimming signal according to a programmable period count code and a programmable brightness code, based upon a fundamental frequency, wherein when the conduction time is less than a conduction time lower limit, based upon a down conversion ratio, the dimming circuit reduces a frequency of the dimming signal according to the programmable period count code and the programmable brightness code, wherein the down conversion ratio is greater than 1 to an extent where a dimming conduction time is greater than or equal to a conduction time lower threshold.Type: ApplicationFiled: August 30, 2023Publication date: May 16, 2024Inventors: Chun-Wen Wang, Yi-Hua Chang, Hsing-Shen Huang
-
Patent number: 11985514Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may receive information identifying a sidelink discontinuous reception (DRX) configuration, that is different from an access link DRX configuration, associated with operation in a sidelink communication deployment. The UE may monitor a physical downlink control channel (PDCCH) discontinuously using the sidelink DRX configuration. Numerous other aspects are described.Type: GrantFiled: July 23, 2021Date of Patent: May 14, 2024Assignee: QUALCOMM IncorporatedInventors: Jung Ho Ryu, Sony Akkarakaran, Junyi Li, Tao Luo, Juan Montojo, Jelena Damnjanovic, Hua Wang
-
Patent number: 11984381Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a carrier substrate, an interposer substrate, a semiconductor device, a lid, and a thermal interface material. The interposer substrate is disposed on the carrier substrate. The semiconductor device is disposed on the interposer substrate. The lid is disposed on the carrier substrate to cover the semiconductor device. The thermal interface material is disposed between the lid and the semiconductor device. A first recess is formed on a lower surface of the lid facing the semiconductor device, and the first recess overlaps the semiconductor device in a top view.Type: GrantFiled: November 16, 2021Date of Patent: May 14, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Po-Chen Lai, Ming-Chih Yew, Po-Yao Lin, Chin-Hua Wang, Shin-Puu Jeng
-
Patent number: 11984797Abstract: The present disclosure provides an adapter circuit including a bus capacitor, a PMOS power transistor, and a sampling control module; a positive terminal of the bus capacitor is connected to a DC bus voltage, and a negative terminal of the bus capacitor is connected to a drain of the PMOS power transistor; a gate of the PMOS power transistor is connected to a drive signal, and a source of the PMOS power transistor is grounded; the sampling control module is used to obtain the drive signal by detecting an AC mains input voltage and a power-down voltage when the bus discharges, so as to turn off the PMOS power transistor after the AC mains input voltage reaches a peak value, and turn on the PMOS power transistor after the power-down voltage reaches a set voltage; the drive signal includes a PMOS Turn-on signal and a PMOS Turn-off signal.Type: GrantFiled: July 5, 2023Date of Patent: May 14, 2024Assignee: ZHEJIANG UNIVERSITYInventors: Faxin Yu, Yihe Wang, Xiaofeng Lv, Hua Chen, Jiongjiong Mo, Zhiyu Wang
-
Patent number: 11984378Abstract: A semiconductor package structure includes an interposer substrate formed over a package substrate. The structure also includes a die disposed over the interposer substrate. The structure also includes a first heat spreader disposed over the package substrate. The structure also includes a second heat spreader disposed over the die and connected to the first heat spreader. The coefficient of thermal expansion (CTE) of the first heat spreader and the coefficient of thermal expansion of the second heat spreader are different.Type: GrantFiled: May 13, 2021Date of Patent: May 14, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shu-Shen Yeh, Po-Yao Lin, Chin-Hua Wang, Yu-Sheng Lin, Shin-Puu Jeng
-
Patent number: 11984510Abstract: The present application discloses a composite metal oxide semiconductor which is a metal oxide semiconductor doped with a rare earth oxide. Even doping the praseodymium oxide or ytterbium oxide at a small doping amount, oxygen vacancies could be suppressed as well as the mobility be maintained; critically, the thin-films made thereof can avoid the influence of light on I-V characteristics and stability, which results in great improvement of the stability under illumination of metal oxide semiconductor devices. The present application also disclose the thin-film transistors made thereof the composite metal oxide semiconductor and its application.Type: GrantFiled: November 8, 2019Date of Patent: May 14, 2024Assignee: South China University of TechnologyInventors: Miao Xu, Hua Xu, Weijing Wu, Weifeng Chen, Lei Wang, Junbiao Peng
-
Patent number: 11985399Abstract: A photographing apparatus and an inspection device are provided. The photographing apparatus comprises a camera, a light supplementing structure, and a closed housing; the camera is provided with a lens, and positioned in and connected to the housing; the housing is provided with at least one photographing portion configured to be attached to an object to be photographed, and a space is formed between the lens and the photographing portion; the light supplementing structure is positioned in and connected to the housing, the light supplementing structure is configured to emit light to said object through the space and the photographing portion, and the lens is configured to capture an image of said object via the photographing portion. The inspection device comprises a rack and the photographing apparatus, and the housing is connected to the rack.Type: GrantFiled: May 25, 2020Date of Patent: May 14, 2024Assignee: SICHUAN ENERGY INTERNET RESEARCH INSTITUTE, TSINGHUA UNIVERSITYInventors: Yongcan Chen, Hua Zhang, Haoran Wang, Yonglong Li, Jialong Li, Zhaowei Liu, Shuang Wang
-
Publication number: 20240151736Abstract: The disclosure provides an apparatus for high throughput analysis of samples and a method of making an assay card and performing an assay using the apparatus. The apparatus can include a transporter to position and advance a first plate of the QMAX card, a first dispenser to deposit a sample on the first plate, a second dispenser to dispense a reagent to contact the sample, a press to compress the sample between the first and second plates of the QMAX card into a uniformly thick layer, and an imager to image the uniformly thick layer.Type: ApplicationFiled: January 12, 2024Publication date: May 9, 2024Applicant: Essenlix CorporationInventors: Stephen Y. CHOU, Hua TAN, Yanjun WANG, Wei DING
-
Publication number: 20240153840Abstract: A method for forming a package structure is provided. The method includes disposing a semiconductor die over a carrier substrate, wherein a removable film is formed over the semiconductor die, disposing a first stacked die package structure over the carrier substrate, wherein a top surface of the removable film is higher than a top surface of the first stacked die package structure, and removing the removable film to expose a top surface of the semiconductor die, wherein a top surface of the semiconductor die is lower than the top surface of the first stacked die package structure.Type: ApplicationFiled: January 18, 2024Publication date: May 9, 2024Inventors: Shin-Puu JENG, Po-Yao LIN, Feng-Cheng HSU, Shuo-Mao CHEN, Chin-Hua WANG
-
Publication number: 20240152880Abstract: A multi-channel payment method for a multi-channel payment system comprises the payer or the payee who initiated the payment request logs in to the multi-channel payment system; the payer or the payee who initiated the payment request placing an order in the multi-channel payment system, wherein the order comprises a designated payment gateway; the multi-channel payment system determining a predicted fee of the order according to the designated payment gateway, past order records, and a real-time exchange rate; the multi-channel payment system performing an anti-money laundering verification of the order; the payer reviewing the order and the predicted fee through a multiple auditing method; and the multi-channel payment system executing payment from the payer to the payee according to the order and the designated payment gateway, and storing a payment detail of the order.Type: ApplicationFiled: February 13, 2023Publication date: May 9, 2024Applicant: OBOOK INC.Inventors: Chun-Kai Wang, Chung-Han Hsieh, Chun-Jen Chen, Po-Hua Lin, Wei-Te Lin, Pei-Hsuan Weng, Mei-Su Wang, I-Cheng Lin, Cheng-Wei Chen
-
Publication number: 20240154629Abstract: A 24 GHz band-pass filter includes a step impedance resonator, a first U-shape feeding portion, a second U-shape feeding portion, short-circuit stubs and open-circuit stubs. The step impedance resonator includes a first main portion, a second main portion, and a connection portion for connecting the main portions to each other. The first main portion and the second main portion are electrically connected to a first signal input/output port and a second signal input/output port. The first U-shape feeding portion is electrically connected between the first main portion and the first signal input/output port. The second U-shape feeding portion is electrically connected between the second main portion and the second signal input/output port. The short-circuit stubs are electrically connected to coupling segments of the step impedance resonator. The open-circuit stubs are electrically connected to the first U-shape feeding portion and the second U-shape feeding portion.Type: ApplicationFiled: November 1, 2023Publication date: May 9, 2024Inventors: Kun Yen TU, Meng-Hua TSAI, Wei Ting LEE, Sin-Siang WANG
-
Publication number: 20240153839Abstract: A semiconductor package structure includes an interposer substrate formed over a package substrate. The structure also includes a die disposed over the interposer substrate. The structure also includes a first heat spreader disposed over the package substrate. The structure also includes a second heat spreader disposed over the die and connected to the first heat spreader. The coefficient of thermal expansion (CTE) of the first heat spreader and the coefficient of thermal expansion of the second heat spreader are different.Type: ApplicationFiled: January 12, 2024Publication date: May 9, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shu-Shen YEH, Po-Yao LIN, Chin-Hua WANG, Yu-Sheng LIN, Shin-Puu JENG
-
Publication number: 20240155699Abstract: Methods and apparatus for offloading wireless connections are disclosed. An example method includes configuring a wireless offload engine to maintain a wireless connection on behalf of one or more circuits coupled to the wireless offload engine, determining that the one or more circuits are to enter a low-power state, and maintaining the wireless connection after the one or more circuits have entered the low-power state based at least in part on the configuring.Type: ApplicationFiled: November 4, 2022Publication date: May 9, 2024Inventors: Shao-Hua FENG, Chun-Guang WANG
-
Patent number: 11978417Abstract: A pixel array substrate includes multiple data lines, multiple scan lines and multiple pixel structures. The scan lines include an m-th scan line and an (m+1)-th scan line arranged in sequence, and m is a positive integer. The pixel structures include first to twenty-fourth pixel structures. A control terminal of a transistor of the seventh pixel structure and a control terminal of a transistor of the eighth pixel structure are electrically connected to the (m+1)-th scan line and the m-th scan line respectively. A control terminal of a transistor of the thirteenth pixel structure and a control terminal of a transistor of the fourteenth pixel structure are electrically connected to the (m+1)-th scan line and the m-th scan line respectively.Type: GrantFiled: June 26, 2023Date of Patent: May 7, 2024Assignee: AUO CorporationInventors: Shiuan-Hua Huang, Lin-Chieh Wei, Chun-Min Wang
-
Patent number: 11978678Abstract: A display device includes a first substrate, a light-emitting element, a light conversion layer, and a color filter layer. The light-emitting element is disposed on the first substrate. The light conversion layer is disposed on the light-emitting element. In addition, the color filter layer is overlapped the light-emitting element and the light conversion layer.Type: GrantFiled: August 5, 2022Date of Patent: May 7, 2024Assignee: INNOLUX CORPORATIONInventors: Tung-Kai Liu, Tsau-Hua Hsieh, Wei-Cheng Chu, Chun-Hsien Lin, Chandra Lius, Ting-Kai Hung, Kuan-Feng Lee, Ming-Chang Lin, Tzu-Min Yan, Hui-Chieh Wang
-
Patent number: 11979903Abstract: A base station may instruct a UE to use at least one weighting factor associated with a CR for the UE, and the UE may apply the at least one weighting factor to the one or more resources scheduled for the PSSCH transmission to determine the CR. The UE may transmit the PSSCH in the one or more resources of the at least one slot based on the determined CR being less than or equal to a CR threshold value. The at least one weighting factor may be applied to the one or more resources in each of multiple slots scheduled for transmission of a PSSCH.Type: GrantFiled: April 15, 2021Date of Patent: May 7, 2024Assignee: QUALCOMM IncorporatedInventors: Hua Wang, Sony Akkarakaran, Jung Ho Ryu, Tao Luo, Junyi Li
-
Patent number: 11977850Abstract: A method for dialogue processing, an electronic device and a storage medium are provided. The specific technical solution includes: obtaining a dialogue history; selecting a target machine from a plurality of machines; inputting the dialogue history into a trained dialogue model in the target machine to generate a response to the dialogue history, in which the dialogue model comprises a common parameter and a specific parameter, and different machines correspond to the same common parameter.Type: GrantFiled: August 25, 2021Date of Patent: May 7, 2024Assignee: BEIJING BAIDU NETCOM SCIENCE AND TECHNOLOGY CO., LTD.Inventors: Fan Wang, Siqi Bao, Huang He, Hua Wu, Jingzhou He, Haifeng Wang