Abstract: A semiconductor device includes a substrate, a first dielectric layer, a second dielectric layer, and a third dielectric layer. The first dielectric layer is disposed on the substrate, around a first metal interconnection. The second dielectric layer is disposed on the first dielectric layer, around a via and a second metal interconnection. The second metal interconnection directly contacts the first metal interconnection. The third dielectric layer is disposed on the second dielectric layer, around a first magnetic tunneling junction (MTJ) structure and a third metal interconnection. The third metal interconnection directly contacts top surfaces of the first MTJ structure and the second metal interconnection, and the first MTJ structure directly contacts the via.

Abstract: A semiconductor memory device includes a substrate having a memory area and a logic circuit area thereon, a first interlayer dielectric layer on the substrate, and a second interlayer dielectric layer on the substrate. An embedded memory cell structure is disposed within the memory area between the first interlayer dielectric layer and the second interlayer dielectric layer. The second interlayer dielectric layer includes a first portion covering the embedded memory cell structure within the memory area and a second portion covering the logic circuit area. A top surface of the first portion is coplanar with a top surface of the second portion.

Abstract: The present disclosure relates to the technical field of semiconductor integrated circuits and discloses a multi-mode array structure for in-memory computing, and a chip, including: an array of memory cells, function lines corresponding to all the memory cells measured by rows in the array of memory cells, and complementary function lines and bit lines BL corresponding to all the memory cells measured by columns in the array of memory cells. According to the present disclosure, the TCAM function and CNN and SNN operations are enabled; the multi-mode array for in-memory computing herein goes beyond the limits of the von Neumann architecture by integrating the multiple modes of storage and computation, achieving efficient operation and computation; in addition to solving the computing power problem, a new array mode is provided to promote the development of high-integration circuits.

Abstract: A method for rapidly detecting pesticides based on thin-layer chromatography (TLC) and enzyme inhibition principles. The method includes the following steps: cutting a TLC plate into a rectangle, and using one end of the rectangle to contact a sample extract to form a pesticide residue separation area; covering the other end of the rectangle with a small piece cut from filter paper or glass fiber and fixing on a piece of enzyme inhibition reaction test paper to form a pesticide enrichment area; pasting a side of the enzyme inhibition reaction test paper away from the pesticide residue separation area with a piece of filter paper immobilized with a chromogenic agent to form a substrate color development area; and performing color reaction.

Abstract: Techniques and apparatuses directed to component shielding are described in this document. A first aspect relates to a system including a printed circuit board (PCB) oriented along a first plane, a device on the PCB, and a component shield having a wall structure oriented perpendicular to the first plane and a cover structure connected to the wall structure. The system includes a housing structure oriented along a second plane that is substantially parallel to the first plane. The first and second planes define a shielded space within which the component shield and the device reside. The system further includes a shielding layer residing at least partially between the cover and housing structures. The shielding layer has an irregular cross-section along a fourth plane perpendicular to at least one of the first or second planes and a third plane. The irregular cross-section includes a protrusion that extends from the third plane.

Abstract: An integrated portable extremely fast charger (XFC) may be installed for heavy-duty off-road vehicles, such as tractors and combine harvesters. The XFC shortens the charging period of plug-in hybrid electric vehicles (PHEVs) and battery electric vehicles (BEVs) by providing >500 kW in a single charger. The proposed XFC integrates a solar farm and local energy storage system (ESS) such that the local grid only needs to provide the power gap between the vehicle battery and the local ESS during charging events, yielding a low-cost XFC installation and higher renewable energy penetration. Two design approaches for the XFC, conductive and wireless, are based on multiphase interleaved dc-dc converter circuit, permitting flexible access to electricity. Smart fault protection mechanism is also proposed to achieve high safety during charging events. The hexagonal prism charger may be integrated into the power electronic devices with a transformer, yielding a high compactness and power density.

Abstract: Lithium-sulfur (Li—S) batteries using unconventional-phase transition metal dichalcogenides (TMDs), such as 1T?-WS2, as the functional layer on the separator. The unique atomic structure of 1T?-WS2 facilitates the strong immobilization and excellent catalytic ability in the conversion of polysulfide intermediates during cycling. Furthermore, the self-assembling of 1T?-WS2 greatly decreases the internal porosity, minimizing the uptake of electrolyte, which can further guarantee the performance of the battery under lean electrolyte conditions. As a result, a cell based on the 1T?-WS2 shows improved performances under high sulfur loading and lean electrolyte conditions. A cell with 12 mg cm?2 mass loading of S with only 25% oversized Li metal anode can deliver specific energy of at least 400 Wh kg?1 and 820 Wh L?1, which is among the best of reported Li—S batteries.

Abstract: Embodiments herein describe techniques for a memory device including at least two memory cells. A first memory cell includes a first storage cell and a first transistor to control access to the first storage cell. A second memory cell includes a second storage cell and a second transistor to control access to the second storage cell. A shared contact electrode is shared between the first transistor and the second transistor, the shared contact electrode being coupled to a source area or a drain area of the first transistor, coupled to a source area or a drain area of the second transistor, and further being coupled to a bit line of the memory device. Other embodiments may be described and/or claimed.

Abstract: In an embodiment, a structure includes: a processor device including logic devices; a first memory device directly face-to-face bonded to the processor device by metal-to-metal bonds and by dielectric-to-dielectric bonds; a first dielectric layer laterally surrounding the first memory device; a redistribution structure over the first dielectric layer and the first memory device, the redistribution structure including metallization patterns; and first conductive vias extending through the first dielectric layer, the first conductive vias connecting the metallization patterns of the redistribution structure to the processor device.

Abstract: In one embodiment, a method for auditing the results of a machine learning model includes: retrieving a set of state estimates for original time series data values from a database under audit; reversing the state estimation computation for each of the state estimates to produce reconstituted time series data values for each of the state estimates; retrieving the original time series data values from the database under audit; comparing the original time series data values pairwise with the reconstituted time series data values to determine whether the original time series and reconstituted time series match; and generating a signal that the database under audit (i) has not been modified where the original time series and reconstituted time series match, and (ii) has been modified where the original time series and reconstituted time series do not match.

Abstract: This application discloses a data writing method, device, a storage server and a computer readable storage medium, including: writing, when a write request is received, write data corresponding to the write request to a write buffer; acquiring historical access data of a data block corresponding to to-be-flushed data in the write buffer when a data flushing operation is triggered for the write buffer; determining whether the to-be-flushed data is write-only data based on the historical access data by using a pre-trained classifier; if yes, writing the to-be-flushed data to a hard disk drive; and if no, writing the to-be-flushed data to a cache. The data writing method provided by this application can effectively reduce the traffic of writing dirty data to the cache while reserving more space in the cache for the ordinary data, thereby improving the utilization of the cache space and the read hit rate of the cache.

Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming a plurality of diodes on a first substrate and forming a first pattern array on a second substrate. The method also includes transferring the plurality of diodes from the first substrate to the second substrate. The method further includes forming the first pattern array on a third substrate. In addition, the method includes transferring the plurality of diodes from the second substrate to the third substrate. The method also includes forming a second pattern array on a fourth substrate. The method further includes transferring the plurality of diodes from the third substrate to the fourth substrate. The pitch between the plurality of diodes on the first substrate is different from the pitch of the first pattern array.

Abstract: A system and method for ultrasound imaging may involve the use of an ultrasound probe and a processor coupled to the probe and to a source of previously-acquired ultrasound image data. The processor may be configured to receive patient identification information (e.g., responsive to user input and/or supplemented by additional information such a photo of the patient), to determine whether the patient identification information identifies a recurring patient, and if so, to retrieve, from the source of previously-acquired ultrasound image data, previous ultrasound images associated with the recurring patient. The processor may be further configured to generate a current ultrasound image based on signals received from the prove and to apply a neural network to the current ultrasound image and the previous ultrasound images to identify a matching pair of images, such that imaging settings from the matched previous image may be applied to the system for subsequent imaging.

Abstract: A method for fabricating semiconductor device includes the steps of forming an inter-metal dielectric (IMD) layer on a substrate, forming a metal interconnection in the IMD layer, forming a magnetic tunneling junction (MTJ) on the metal interconnection, and performing a trimming process to shape the MTJ. Preferably, the MTJ includes a first slope and a second slope and the first slope is less than the second slope.

Abstract: A nonlinear oxygen-enriched injection method based on chaotic mapping and electronic device is disclosed, including: obtaining a chaotic gas injection volume corresponding to a current speed change period according to a chaotic mapping value corresponding to the current speed change period and a peak gas injection volume in an oxygen-enriched injection process; determining a rotational speed of a fan blade in a fan component corresponding to the current speed change period according to the chaotic gas injection volume; updating a rotational speed of a direct current (DC) motor in the fan component corresponding to the current speed change period according to the rotational speed of the fan blade in the fan component, and driving the fan blade to rotate according to an updated rotational speed of the DC motor, so as to update an air output of the fan component. The above operations are repeated until a last stage.

Abstract: A high anti-interference microsystem based on System In Package (SIP) for a power grid is provided. The high anti-interference microsystem comprises a ceramic cavity, a ceramic substrate, a magnetic cover plate, a digital signal processing circuit, an analog signal conditioning circuit and a shield, wherein the ceramic cavity supports the ceramic substrate, the magnetic cover plate is in sealed contact with the ceramic cavity, and the ceramic substrate is arranged in a cavity formed by the ceramic cavity and the magnetic cover plate; a sealed shell of the microsystem based on SIP is composed of the magnetic cover plate and the ceramic cavity; the digital signal processing circuit and the analog signal conditioning circuit are arranged on the ceramic substrate and respectively process received signals to be processed; the shield covers an outer side of the sealed shell and is used for shielding external magnetic field interference.

Abstract: A package includes a memory stack attached to a logic device, the memory stack including first memory structures, a first redistribution layer over and electrically connected to the first memory structures, second memory structures on the first redistribution layer, a second redistribution layer over and electrically connected to the second memory structures, and first metal pillars on the first redistribution layer and adjacent the second memory structures, the first metal pillars electrically connecting the first redistribution layer and the second redistribution layer, wherein each first memory structure of the first memory structures includes a memory die comprising first contact pads and a peripheral circuitry die comprising second contact pads, wherein the first contact pads of the memory die are bonded to the second contact pads of the peripheral circuitry die.

Abstract: An image sensor includes a photoelectric conversion layer, a plurality of deep trench isolations, a first color filter, a first deflector, and a covering layer. The photoelectric conversion layer includes a first photodiode and a second photodiode. The deep trench isolations separate the first photodiode and the second photodiode, in which a pixel dimension is determined by a distance between two adjacent deep trench isolations. The first color filter is disposed on the first photodiode and the second photodiode. The first deflector is disposed on the first color filter. The covering layer covers and surrounds the first deflector. A refractive index of the covering layer is greater than a refractive index of the first deflector, and a difference value between the refractive index of the covering layer and the refractive index of the first deflector is in a range from 0.15 to 0.6.

Abstract: Systems and methods are described for generating record clusters. The methods comprise receiving a plurality of records from data sources and providing at least a subset of the records to a scoring model that determines scores for various pairings of the records, a score for a given pair of the records representing a probability that the given pair of records contain data elements about the same entity. The method further comprises generating a graph data structure that includes a plurality of nodes, individual nodes representing a different record from the records. The method also comprises assigning a different unique identifier to individual clusters of the final clusters and responding to a request for data regarding a given entity by providing aggregated data elements from those records of the records associated with a cluster of the final clusters having an identifier that represents the given entity.

Abstract: A series-parallel monorail hoist based on an oil-electric hybrid power and a controlling method thereof. The monorail hoist includes a cabin, a hydraulic driving system, a lifting beam, a gear track driving and energy storage system, and a speed adaptive control system connected in series with each other and travelling on a track. The monorail hoist is capable of implementing an independent drive by an electric motor or a diesel engine in an endurance mode, a hybrid drive of the electric motor and the diesel engine in a transportation mode, and a hybrid drive of the diesel engine and a flywheel energy storage system in a climbing mode, according to different operating conditions that include conditions of an upslope, a downslope and a load. Power requirements for the monorail hoist under various operating conditions are satisfied, and the excess energy is recovered during the process of travelling.